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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-12-27 19:26:04 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-12-27 19:26:04 +0000 |
commit | 2a3ab58a75a6fe51bf323a83f78a2e86ca2bc133 (patch) | |
tree | 8817df20f00956d7df3b8ca6de3a145c257c154a /nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h | |
parent | a7bfa13bc1055fa88761d8536e2d754bd7f932e2 (diff) | |
download | px4-nuttx-2a3ab58a75a6fe51bf323a83f78a2e86ca2bc133.tar.gz px4-nuttx-2a3ab58a75a6fe51bf323a83f78a2e86ca2bc133.tar.bz2 px4-nuttx-2a3ab58a75a6fe51bf323a83f78a2e86ca2bc133.zip |
Logic to get base frequency of a domain
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2440 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h')
-rwxr-xr-x | nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h | 49 |
1 files changed, 47 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h b/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h index 631581124..0fb105c8d 100755 --- a/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h +++ b/nuttx/arch/arm/src/lpc313x/lpc313x_cgudrvr.h @@ -337,11 +337,49 @@ enum lpc313x_clockid_e * Public Data ************************************************************************/ +/* This array must be provided by the board-specific logic to provide + * the programmed frequency of every input source. + */ + +EXTERN int32_t g_boardfreqin[CGU_NFREQIN]; + /************************************************************************ * Inline Functions ************************************************************************/ -/* Enable the specified clock */ +/************************************************************************ + * Name: lpc313x_basefreq + * + * Description: + * Return the base frequency associated with a clock domain + * + ************************************************************************/ + +static inline int32_t lpc313x_basefreq(enum lpc313x_domainid_e dmnid) +{ + uint32_t regval; + int ndx; + + /* Fetch the SSR register associated with this clock domain */ + + regval = getreg32(LPC313X_CGU_SSR_OFFSET((int)dmnid)); + + /* Extract the last frequency input selection */ + + ndx = (regval & CGU_SSR_FS_MASK) >> CGU_SSR_FS_SHIFT; + + /* And return the user-supplied value for that frequency input */ + + return g_boardfreqin[ndx]; +} + +/************************************************************************ + * Name: lpc313x_enableclock + * + * Description: + * Enable the specified clock + * + ************************************************************************/ static inline void lpc313x_enableclock(enum lpc313x_clockid_e clkid) { @@ -352,7 +390,13 @@ static inline void lpc313x_enableclock(enum lpc313x_clockid_e clkid) putreg32(regval, address); } -/* Disable the specified clock */ +/************************************************************************ + * Name: lpc313x_disableclock + * + * Description: + * Disable the specified clock + * + ************************************************************************/ static inline void lpc313x_disableclock(enum lpc313x_clockid_e clkid) { @@ -373,6 +417,7 @@ static inline void lpc313x_disableclock(enum lpc313x_clockid_e clkid) * Description: * Given a clock ID, return the ID of the domain in which the clock * resides. + * ************************************************************************/ EXTERN enum lpc313x_domainid_e lpc313x_clkdomain(enum lpc313x_clockid_e clkid); |