diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-07-04 17:59:16 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-07-04 17:59:16 +0000 |
| commit | 876001162c43d26904d2ef2ac242e1267d3b5942 (patch) | |
| tree | afdac7876afe410da2da74a542b22cec254bbedb /nuttx/arch/arm/src/lpc43xx/chip | |
| parent | 6e63518d400fabf1531c9fb5445382951e3fbb02 (diff) | |
| download | px4-nuttx-876001162c43d26904d2ef2ac242e1267d3b5942.tar.gz px4-nuttx-876001162c43d26904d2ef2ac242e1267d3b5942.tar.bz2 px4-nuttx-876001162c43d26904d2ef2ac242e1267d3b5942.zip | |
Progress of LPC43xx build environment
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4904 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc43xx/chip')
| -rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h | 47 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h | 6 |
2 files changed, 5 insertions, 48 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h index 49c0fea62..97117466b 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_gpio.h @@ -45,51 +45,8 @@ /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ -/* Indices */ - -#deine LPC43_GPIO_PORT0 0 -#deine LPC43_GPIO_PORT1 1 -#deine LPC43_GPIO_PORT2 2 -#deine LPC43_GPIO_PORT3 3 -#deine LPC43_GPIO_PORT4 4 -#deine LPC43_GPIO_PORT5 5 -#deine LPC43_GPIO_PORT6 6 -#deine LPC43_GPIO_PORT7 7 - -#deine LPC43_GPIO_PIN0 0 -#deine LPC43_GPIO_PIN1 1 -#deine LPC43_GPIO_PIN2 2 -#deine LPC43_GPIO_PIN3 3 -#deine LPC43_GPIO_PIN4 4 -#deine LPC43_GPIO_PIN5 5 -#deine LPC43_GPIO_PIN6 6 -#deine LPC43_GPIO_PIN7 7 -#deine LPC43_GPIO_PIN8 8 -#deine LPC43_GPIO_PIN9 9 -#deine LPC43_GPIO_PIN10 10 -#deine LPC43_GPIO_PIN11 11 -#deine LPC43_GPIO_PIN12 12 -#deine LPC43_GPIO_PIN13 13 -#deine LPC43_GPIO_PIN14 14 -#deine LPC43_GPIO_PIN15 15 -#deine LPC43_GPIO_PIN16 16 -#deine LPC43_GPIO_PIN17 17 -#deine LPC43_GPIO_PIN18 18 -#deine LPC43_GPIO_PIN19 19 -#deine LPC43_GPIO_PIN20 20 -#deine LPC43_GPIO_PIN21 21 -#deine LPC43_GPIO_PIN22 22 -#deine LPC43_GPIO_PIN23 23 -#deine LPC43_GPIO_PIN24 24 -#deine LPC43_GPIO_PIN25 25 -#deine LPC43_GPIO_PIN26 26 -#deine LPC43_GPIO_PIN27 27 -#deine LPC43_GPIO_PIN28 28 -#deine LPC43_GPIO_PIN29 29 -#deine LPC43_GPIO_PIN30 30 -#deine LPC43_GPIO_PIN31 31 - -/* Register Offsets *********************************************************************************/ + + /* Register Offsets *********************************************************************************/ /* Pin interrupt registers (relative to LPC43_GPIOINT_BASE) */ diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h index 59678c114..64c6dc6f8 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_scu.h @@ -218,7 +218,7 @@ * PF_0 to PF_11 */ /* Bits 0-4: Same as common bit definitions */ -#define SCU_NDPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate. +#define SCU_NDPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate */ /* Bits 6-31: Same as common bit definitions */ /* Pin configuration registers for high-speed pins * @@ -240,7 +240,7 @@ * P3_3 and pins CLK0 to CLK3 */ /* Bits 0-4: Same as common bit definitions */ -#define SCU_HSPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate. +#define SCU_HSPIN_EHS (1 << 5) /* Bit 5: EHS Select Slew rate */ /* Bits 6-31: Same as common bit definitions */ /* Pin configuration register for USB1 pins USB1_DP/USB1_DM */ @@ -324,7 +324,7 @@ #define SCU_EMCDELAYCLK_SHIFT (0) /* Bits 0-15: EMC_CLKn SDRAM clock output delay */ #define SCU_EMCDELAYCLK_MASK (0xffff << SCU_EMCDELAYCLK_SHIFT) -# define SCU_EMCDELAYCLK(n( ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */ +# define SCU_EMCDELAYCLK(n) ((n) << SCU_EMCDELAYCLK_SHIFT) /* 0=no delay, N*0x1111 = N*0.5 ns delay */ /* Bits 16-31: Reserved */ /* Pin interrupt select register 0 */ |