diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-07-07 15:29:13 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-07-07 15:29:13 +0000 |
| commit | ac94ef18a7373645f708c1256df06e369ea9f371 (patch) | |
| tree | f687b0a066cf60cf2f9bcd25b2e15fccf12f2849 /nuttx/arch/arm/src/lpc43xx/chip | |
| parent | 873dfa2ae7f7eb298fbae5a1e3e22d4877bbcb30 (diff) | |
| download | px4-nuttx-ac94ef18a7373645f708c1256df06e369ea9f371.tar.gz px4-nuttx-ac94ef18a7373645f708c1256df06e369ea9f371.tar.bz2 px4-nuttx-ac94ef18a7373645f708c1256df06e369ea9f371.zip | |
Straighten out LPC32 UART clocking (still some baud calculation issues)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4917 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc43xx/chip')
| -rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h | 98 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h | 23 |
2 files changed, 72 insertions, 49 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h index 1b2546753..375b0ceb7 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc4310203050_pinconfig.h @@ -812,55 +812,55 @@ #define PINCONF_TRACEDATA3_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_8) #define PINCONF_TRACEDATA3_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_7) -#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_6) -#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_9) -#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_2) -#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_1) -#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_11) -#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_5) -#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_6) -#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_0) -#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_10) -#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_4) -#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_5) -#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_2) -#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_8) -#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_1) - -#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_11) -#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_2) -#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_7) -#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_4) -#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_12) -#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_11) -#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_9) -#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_5) -#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_7) -#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_10) -#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_8) -#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_0) -#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_8) -#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_12) -#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_10) -#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_1) -#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_10) -#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_1) -#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_6) -#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_3) -#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_9) -#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_3) -#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_5) -#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_2) -#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_14) -#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_14) -#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_12) -#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_5) -#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_7) -#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_13) -#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PINSC|PINCONF_PIN_13) -#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_11) -#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_4) -#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11) +#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10) +#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1) + +#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6) #define PINCONF_U2_DIR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_18) #define PINCONF_U2_DIR_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_13) diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h index 0c223335b..911bc6764 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_cgu.h @@ -712,6 +712,29 @@ # define BASE_USART0_CLKSEL_IDIVD (15 << BASE_USART0_CLK_CLKSEL_SHIFT) /* IDIVD */ # define BASE_USART0_CLKSEL_IDIVE (16 << BASE_USART0_CLK_CLKSEL_SHIFT) /* IDIVE */ /* Bits 29-31: Reserved */ +/* Output stage 17 control register (BASE_UART1_CLK) */ +/* NOTE: Clocks 4-19 are identical */ + +#define BASE_UART1_CLK_PD (1 << 0) /* Bit 0: Output stage power down */ + /* Bits 1-10: Reserved */ +#define BASE_UART1_CLK_AUTOBLOCK (1 << 11) /* Bit 11: Block clock during frequency change */ + /* Bits 12-23: Reserved */ +#define BASE_UART1_CLK_CLKSEL_SHIFT (24) /* Bits 24-28: Clock source selection */ +#define BASE_UART1_CLK_CLKSEL_MASK (31 << BASE_UART1_CLK_CLKSEL_SHIFT) +# define BASE_UART1_CLKSEL_32KHZOSC (0 << BASE_UART1_CLK_CLKSEL_SHIFT) /* 32 kHz oscillator */ +# define BASE_UART1_CLKSEL_IRC (1 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IRC (default) */ +# define BASE_UART1_CLKSEL_ENET_RXCLK (2 << BASE_UART1_CLK_CLKSEL_SHIFT) /* ENET_RX_CLK */ +# define BASE_UART1_CLKSEL_ENET_TXCLK (3 << BASE_UART1_CLK_CLKSEL_SHIFT) /* ENET_TX_CLK */ +# define BASE_UART1_CLKSEL_GPCLKIN (4 << BASE_UART1_CLK_CLKSEL_SHIFT) /* GP_CLKIN */ +# define BASE_UART1_CLKSEL_XTAL (6 << BASE_UART1_CLK_CLKSEL_SHIFT) /* Crystal oscillator */ +# define BASE_UART1_CLKSEL_PLL0AUDIO (8 << BASE_UART1_CLK_CLKSEL_SHIFT) /* PLL0AUDIO */ +# define BASE_UART1_CLKSEL_PLL1 (9 << BASE_UART1_CLK_CLKSEL_SHIFT) /* PLL1 */ +# define BASE_UART1_CLKSEL_IDIVA (12 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVA */ +# define BASE_UART1_CLKSEL_IDIVB (13 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVB */ +# define BASE_UART1_CLKSEL_IDIVC (14 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVC */ +# define BASE_UART1_CLKSEL_IDIVD (15 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVD */ +# define BASE_UART1_CLKSEL_IDIVE (16 << BASE_UART1_CLK_CLKSEL_SHIFT) /* IDIVE */ + /* Bits 29-31: Reserved */ /* Output stage 18 control register (BASE_USART2_CLK) */ /* NOTE: Clocks 4-19 are identical */ |