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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-01-23 03:05:05 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-01-23 03:05:05 +0000 |
commit | 82c299159a50c72fc530abbd2210f084b5bcd938 (patch) | |
tree | f9169bd45dc5766382e6f0fd9efb63e7ca027e93 /nuttx/arch/arm/src/sam3u/sam3u_irq.c | |
parent | dfddbfc5b48b54ccfdc5a6a6d096898a6ffdd027 (diff) | |
download | px4-nuttx-82c299159a50c72fc530abbd2210f084b5bcd938.tar.gz px4-nuttx-82c299159a50c72fc530abbd2210f084b5bcd938.tar.bz2 px4-nuttx-82c299159a50c72fc530abbd2210f084b5bcd938.zip |
Misc fixes, add button support, GPIO interrupt support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2523 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/sam3u/sam3u_irq.c')
-rwxr-xr-x | nuttx/arch/arm/src/sam3u/sam3u_irq.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_irq.c b/nuttx/arch/arm/src/sam3u/sam3u_irq.c index d7be1f3d2..6ab7d2551 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_irq.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_irq.c @@ -209,7 +209,7 @@ static int sam3u_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit) if (irq >= SAM3U_IRQ_EXTINT) { - if (irq < NR_IRQS) + if (irq < SAM3U_IRQ_NIRQS) { *regaddr = NVIC_IRQ0_31_ENABLE; *bit = 1 << (irq - SAM3U_IRQ_EXTINT); @@ -317,7 +317,7 @@ void up_irqinitialize(void) irq_attach(SAM3U_IRQ_RESERVED, sam3u_reserved); #endif - sam3u_dumpnvic("initial", NR_IRQS); + sam3u_dumpnvic("initial", SAM3U_IRQ_NIRQS); #ifndef CONFIG_SUPPRESS_INTERRUPTS @@ -327,6 +327,14 @@ void up_irqinitialize(void) up_fiqinitialize(); #endif + /* Initialize logic to support a second level of interrupt decoding for + * GPIO pins. + */ + +#ifdef CONFIG_GPIO_IRQ + sam3u_gpioirqinitialize(); +#endif + /* And finally, enable interrupts */ setbasepri(NVIC_SYSH_PRIORITY_MAX); @@ -356,6 +364,14 @@ void up_disable_irq(int irq) regval &= ~bit; putreg32(regval, regaddr); } +#ifdef CONFIG_GPIO_IRQ + else + { + /* Maybe it is a (derived) GPIO IRQ */ + + sam3u_gpioirqdisable(irq); + } +#endif sam3u_dumpnvic("disable", irq); } @@ -381,6 +397,14 @@ void up_enable_irq(int irq) regval |= bit; putreg32(regval, regaddr); } +#ifdef CONFIG_GPIO_IRQ + else + { + /* Maybe it is a (derived) GPIO IRQ */ + + sam3u_gpioirqenable(irq); + } +#endif sam3u_dumpnvic("enable", irq); } @@ -415,7 +439,7 @@ int up_prioritize_irq(int irq, int priority) uint32_t regval; int shift; - DEBUGASSERT(irq >= SAM3U_IRQ_MPU && irq < NR_IRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); + DEBUGASSERT(irq >= SAM3U_IRQ_MPU && irq < SAM3U_IRQ_NIRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); if (irq < SAM3U_IRQ_EXTINT) { |