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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-10-08 00:37:18 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-10-08 00:37:18 +0000 |
commit | c87ac73912d8d1dc36944c52526f13d24301cd7a (patch) | |
tree | 3ac469cc8242aa9eabf5d99f8fafeee25e167f34 /nuttx/arch/arm/src/sam3u/sam3u_spi.c | |
parent | 77fac8557262940319c3fa3bc473866d4bb90450 (diff) | |
download | px4-nuttx-c87ac73912d8d1dc36944c52526f13d24301cd7a.tar.gz px4-nuttx-c87ac73912d8d1dc36944c52526f13d24301cd7a.tar.bz2 px4-nuttx-c87ac73912d8d1dc36944c52526f13d24301cd7a.zip |
SAM3U: Add logic to bypass automated control of SPI chip selects
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4032 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/sam3u/sam3u_spi.c')
-rw-r--r-- | nuttx/arch/arm/src/sam3u/sam3u_spi.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_spi.c b/nuttx/arch/arm/src/sam3u/sam3u_spi.c index fb83e9312..8f3c2e28b 100644 --- a/nuttx/arch/arm/src/sam3u/sam3u_spi.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_spi.c @@ -369,9 +369,9 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock) DEBUGASSERT(priv->cs == 0xff); - /* Get the chip select associated with this SPI device */ + /* Get the chip select number used with this SPI device */ - priv->cs = sam3u_spiselect(devid); + priv->cs = sam3u_spicsnumber(devid); spivdbg("cs=%d\n", priv->cs); DEBUGASSERT(priv->cs >= 0 && priv->cs <= 3); @@ -389,7 +389,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock) /* At this point, we expect the chip to have already been selected */ #ifdef CONFIG_DEBUG - int cs = sam3u_spiselect(devid); + int cs = sam3u_spicsnumber(devid); DEBUGASSERT(priv->cs == cs); #endif @@ -397,6 +397,22 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock) priv->cs = 0xff; } + + /* Perform any board-specific chip select operations. PIO chip select + * pins may be programmed by the board specific logic in one of two + * different ways. First, the pins may be programmed as SPI peripherals. + * In that case, the pins are completely controlled by the SPI driver. + * This sam3u_spiselect method still needs to be provided, but it may + * be only a stub. + * + * An alternative way to program the PIO chip select pins is as normal + * GPIO outputs. In that case, the automatic control of the CS pins is + * bypassed and this function must provide control of the chip select. + * NOTE: In this case, the GPIO output pin does *not* have to be the + * same as the NPCS pin normal associated with the chip select number. + */ + + sam3u_spiselect(devid, selected); } /**************************************************************************** |