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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-03-10 00:02:11 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-03-10 00:02:11 +0000 |
| commit | ebe8678619fe7bca2fd4f65830192a7559af46c3 (patch) | |
| tree | a16f01389a0d8b50c40d7377d40b11255923ebf3 /nuttx/arch/arm/src/stm32/chip/stm32_can.h | |
| parent | 7960235bf41496b7d26d2362c9889c56c1e6415b (diff) | |
| download | px4-nuttx-ebe8678619fe7bca2fd4f65830192a7559af46c3.tar.gz px4-nuttx-ebe8678619fe7bca2fd4f65830192a7559af46c3.tar.bz2 px4-nuttx-ebe8678619fe7bca2fd4f65830192a7559af46c3.zip | |
Add peripheral support for the STM32 F2 family
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4471 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip/stm32_can.h')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32_can.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_can.h b/nuttx/arch/arm/src/stm32/chip/stm32_can.h index 6eb757263..253bf68fc 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_can.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_can.h @@ -61,7 +61,7 @@ /* Number of filters depends on silicon */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_NFILTERS 28 #else # define CAN_NFILTERS 14 @@ -445,14 +445,14 @@ /* CAN filter master register */ #define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FMR_CAN2SB_SHIFT (8) /* Bits 13-8: CAN2 start bank */ # define CAN_FMR_CAN2SB_MASK (0x3f << CAN_FMR_CAN2SB_SHIFT) #endif /* CAN filter mode register */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FM1R_FBM_SHIFT (0) /* Bits 13:0: Filter Mode */ # define CAN_FM1R_FBM_MASK (0x3fff << CAN_FM1R_FBM_SHIFT) #else @@ -462,7 +462,7 @@ /* CAN filter scale register */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FS1R_FSC_SHIFT (0) /* Bits 13:0: Filter Scale Configuration */ # define CAN_FS1R_FSC_MASK (0x3fff << CAN_FS1R_FSC_SHIFT) #else @@ -472,7 +472,7 @@ /* CAN filter FIFO assignment register */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FFA1R_FFA_SHIFT (0) /* Bits 13:0: Filter FIFO Assignment */ # define CAN_FFA1R_FFA_MASK (0x3fff << CAN_FFA1R_FFA_SHIFT) #else @@ -482,7 +482,7 @@ /* CAN filter activation register */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FA1R_FACT_SHIFT (0) /* Bits 13:0: Filter Active */ # define CAN_FA1R_FACT_MASK (0x3fff << CAN_FA1R_FACT_SHIFT) #else |