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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-10 19:07:13 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-10 19:07:13 +0000 |
| commit | 610648a0b4a6115a3d73a40ae108fb18a75c1965 (patch) | |
| tree | b60022b91db5775403fb1e1fca1b5ccd4f69e01e /nuttx/arch/arm/src/stm32/chip/stm32_exti.h | |
| parent | 8a161fa847642f5c652ec4541502c6a8de8a9696 (diff) | |
| download | px4-nuttx-610648a0b4a6115a3d73a40ae108fb18a75c1965.tar.gz px4-nuttx-610648a0b4a6115a3d73a40ae108fb18a75c1965.tar.bz2 px4-nuttx-610648a0b4a6115a3d73a40ae108fb18a75c1965.zip | |
Many STM32 header files updated for F3 support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5635 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip/stm32_exti.h')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32_exti.h | 64 |
1 files changed, 57 insertions, 7 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_exti.h b/nuttx/arch/arm/src/stm32/chip/stm32_exti.h index 5386a260f..b9b27e347 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_exti.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_exti.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32/chip/stm32_exti.h * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -55,6 +55,11 @@ # define STM32_NEXTI 19 # define STM32_EXTI_MASK 0x0007ffff # endif +#eif defined(CONFIG_STM32_STM32F30XX) +# define STM32_NEXTI1 31 +# define STM32_EXTI1_MASK 0xffffffff +# define STM32_NEXTI2 4 +# define STM32_EXTI2_MASK 0x0000000f #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define STM32_NEXTI 23 # define STM32_EXTI_MASK 0x007fffff @@ -64,6 +69,11 @@ /* Register Offsets *****************************************************************/ +#if defined(CONFIG_STM32_STM32F30XX) +# define STM32_EXTI1_OFFSET 0x0000 /* Offset to EXTI1 registers */ +# define STM32_EXTI2_OFFSET 0x0018 /* Offset to EXTI2 registers */ +#endif + #define STM32_EXTI_IMR_OFFSET 0x0000 /* Interrupt mask register */ #define STM32_EXTI_EMR_OFFSET 0x0004 /* Event mask register */ #define STM32_EXTI_RTSR_OFFSET 0x0008 /* Rising Trigger selection register */ @@ -73,12 +83,39 @@ /* Register Addresses ***************************************************************/ -#define STM32_EXTI_IMR (STM32_EXTI_BASE+STM32_EXTI_IMR_OFFSET) -#define STM32_EXTI_EMR (STM32_EXTI_BASE+STM32_EXTI_EMR_OFFSET) -#define STM32_EXTI_RTSR (STM32_EXTI_BASE+STM32_EXTI_RTSR_OFFSET) -#define STM32_EXTI_FTSR (STM32_EXTI_BASE+STM32_EXTI_FTSR_OFFSET) -#define STM32_EXTI_SWIER (STM32_EXTI_BASE+STM32_EXTI_SWIER_OFFSET) -#define STM32_EXTI_PR (STM32_EXTI_BASE+STM32_EXTI_PR_OFFSET) +#if defined(CONFIG_STM32_STM32F30XX) +# define STM32_EXTI1_BASE (STM32_EXTI_BASE+STM32_EXTI1_OFFSET) +# define STM32_EXTI2_BASE (STM32_EXTI_BASE+STM32_EXTI2_OFFSET) + +# define STM32_EXTI1_IMR (STM32_EXTI1_BASE+STM32_EXTI_IMR_OFFSET) +# define STM32_EXTI1_EMR (STM32_EXTI1_BASE+STM32_EXTI_EMR_OFFSET) +# define STM32_EXTI1_RTSR (STM32_EXTI1_BASE+STM32_EXTI_RTSR_OFFSET) +# define STM32_EXTI1_FTSR (STM32_EXTI1_BASE+STM32_EXTI_FTSR_OFFSET) +# define STM32_EXTI1_SWIER (STM32_EXTI1_BASE+STM32_EXTI_SWIER_OFFSET) +# define STM32_EXTI1_PR (STM32_EXTI1_BASE+STM32_EXTI_PR_OFFSET) + +# define STM32_EXTI2_IMR (STM32_EXTI2_BASE+STM32_EXTI_IMR_OFFSET) +# define STM32_EXTI2_EMR (STM32_EXTI2_BASE+STM32_EXTI_EMR_OFFSET) +# define STM32_EXTI2_RTSR (STM32_EXTI2_BASE+STM32_EXTI_RTSR_OFFSET) +# define STM32_EXTI2_FTSR (STM32_EXTI2_BASE+STM32_EXTI_FTSR_OFFSET) +# define STM32_EXTI2_SWIER (STM32_EXTI2_BASE+STM32_EXTI_SWIER_OFFSET) +# define STM32_EXTI2_PR (STM32_EXTI2_BASE+STM32_EXTI_PR_OFFSET) + +# define STM32_EXTI_IMR STM32_EXTI1_IMR +# define STM32_EXTI_EMR STM32_EXTI1_EMR +# define STM32_EXTI_RTSR STM32_EXTI1_RTSR +# define STM32_EXTI_FTSR STM32_EXTI1_FTSR +# define STM32_EXTI_SWIER STM32_EXTI1_SWIER +# define STM32_EXTI_PR STM32_EXTI1_PR + +#else +# define STM32_EXTI_IMR (STM32_EXTI_BASE+STM32_EXTI_IMR_OFFSET) +# define STM32_EXTI_EMR (STM32_EXTI_BASE+STM32_EXTI_EMR_OFFSET) +# define STM32_EXTI_RTSR (STM32_EXTI_BASE+STM32_EXTI_RTSR_OFFSET) +# define STM32_EXTI_FTSR (STM32_EXTI_BASE+STM32_EXTI_FTSR_OFFSET) +# define STM32_EXTI_SWIER (STM32_EXTI_BASE+STM32_EXTI_SWIER_OFFSET) +# define STM32_EXTI_PR (STM32_EXTI_BASE+STM32_EXTI_PR_OFFSET) +#endif /* Register Bitfield Definitions ****************************************************/ @@ -138,4 +175,17 @@ #define EXTI_IMR_SHIFT (0) /* Bits 0-X: Pending bit for all lines */ #define EXTI_IMR_MASK STM32_EXTI_MASK +/* Compatibility Definitions ********************************************************/ + +#if defined(CONFIG_STM32_STM32F30XX) +# define STM32_NEXTI STM32_NEXTI1 +# define STM32_EXTI_MASK STM32_EXTI1_MASK +# define STM32_EXTI_IMR STM32_EXTI1_IMR +# define STM32_EXTI_EMR STM32_EXTI1_EMR +# define STM32_EXTI_RTSR STM32_EXTI1_RTSR +# define STM32_EXTI_FTSR STM32_EXTI1_FTSR +# define STM32_EXTI_SWIER STM32_EXTI1_SWIER +# define STM32_EXTI_PR STM32_EXTI1_PR +#endif + #endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_EXTI_H */ |