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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-09-08 17:56:08 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-09-08 17:56:08 +0000 |
| commit | 577d5456db4d4e5a740208f01362521aeda22aae (patch) | |
| tree | 3f3758da5a79ed3e03f7cec67bcec8a3d7a3e65b /nuttx/arch/arm/src/stm32/chip/stm32_i2c.h | |
| parent | c9e0f9f37ea4d38a26baad8dafbf2e82f73322db (diff) | |
| download | px4-nuttx-577d5456db4d4e5a740208f01362521aeda22aae.tar.gz px4-nuttx-577d5456db4d4e5a740208f01362521aeda22aae.tar.bz2 px4-nuttx-577d5456db4d4e5a740208f01362521aeda22aae.zip | |
Fix I2C/FSMC conflict for STM32; Fix STM32 clock setup
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3942 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip/stm32_i2c.h')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32_i2c.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_i2c.h b/nuttx/arch/arm/src/stm32/chip/stm32_i2c.h index 8e40a3598..2049ac1f4 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_i2c.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_i2c.h @@ -82,7 +82,7 @@ /* Control register 1 */ -#define I2C_CR1_PE (1 << 0) /* Bit 0: Peripheral Enable*/ +#define I2C_CR1_PE (1 << 0) /* Bit 0: Peripheral Enable */ #define I2C_CR1_SMBUS (1 << 1) /* Bit 1: SMBus Mode */ #define I2C_CR1_SMBTYPE (1 << 3) /* Bit 3: SMBus Type */ #define I2C_CR1_ENARP (1 << 4) /* Bit 4: ARP Enable */ @@ -167,7 +167,7 @@ #define I2C_CCR_CCR_SHIFT (0) /* Bits 11-0: Clock Control Register in Fast/Standard mode (Master mode) */ #define I2C_CCR_CCR_MASK (0x0fff << I2C_CCR_CCR_SHIFT) #define I2C_CCR_DUTY (1 << 14) /* Bit 14: Fast Mode Duty Cycle */ -#define I2C_CCR_FS (1 << 15) /* Bit 15: I2C Master Mode Selection */ +#define I2C_CCR_FS (1 << 15) /* Bit 15: Fast Mode Selection */ /* TRISE Register */ |