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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-04-01 13:43:31 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-04-01 13:43:31 +0000 |
| commit | e3fe81779352589122b14c80287122aef30a2e14 (patch) | |
| tree | b023368884367ed0be578090c93bff4047a6cc78 /nuttx/arch/arm/src/stm32/chip/stm32_pwr.h | |
| parent | 8e9c9c4fd33836b5504ede9cacdb111d6877ef1b (diff) | |
| download | px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.tar.gz px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.tar.bz2 px4-nuttx-e3fe81779352589122b14c80287122aef30a2e14.zip | |
Add support for STM32 F427/437 chips. From Mike Smith
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5807 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip/stm32_pwr.h')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32_pwr.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_pwr.h b/nuttx/arch/arm/src/stm32/chip/stm32_pwr.h index 4e817a2c1..8e3eedc23 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_pwr.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_pwr.h @@ -80,7 +80,16 @@ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define PWR_CR_FPDS (1 << 9) /* Bit 9: Flash power down in Stop mode */ -# define PWR_CR_VOS (1 << 14) /* Bit 14: Regulator voltage scaling output selection */ +# if defined(CONFIG_STM32_STM32F427) +# define PWR_CR_ADCDC1 (1 << 13) /* Bit 13: see AN4073 for details */ +# define PWR_CR_VOS_SCALE_1 (3 << 14) /* Fmax = 168MHz */ +# define PWR_CR_VOS_SCALE_2 (2 << 14) /* Fmax = 144MHz */ +# define PWR_CR_VOS_SCALE_3 (1 << 14) /* Fmax = 120MHz */ +# define PWR_CR_VOS_MASK (3 << 14) /* Bits 14-15: Regulator voltage scaling output selection */ +# else +# define PWR_CR_VOS (1 << 14) /* Bit 14: Regulator voltage scaling output selection */ + /* 0: Fmax = 144MHz 1: Fmax = 168MHz */ +# endif #endif /* Power control/status register */ |