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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-11-20 14:01:44 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-11-20 14:01:44 +0000 |
| commit | b09418b0e1265fdaeb5234d79ebd11e0496393be (patch) | |
| tree | 017bc5e3cbe7d9025b722f4880811338c945d25d /nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h | |
| parent | fa09debae62c900129855fe03932ab0ceef2d0b0 (diff) | |
| download | px4-nuttx-b09418b0e1265fdaeb5234d79ebd11e0496393be.tar.gz px4-nuttx-b09418b0e1265fdaeb5234d79ebd11e0496393be.tar.bz2 px4-nuttx-b09418b0e1265fdaeb5234d79ebd11e0496393be.zip | |
Update ADC header file for the STM32F40xxx
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4105 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h b/nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h index a6ba6c76e..3d118fd8c 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h @@ -2,7 +2,7 @@ * arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h * * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -140,6 +140,10 @@ #define STM32_USART1_BASE 0x40011000 /* 0x40011000-0x400113ff: USART1 */ #define STM32_USART6_BASE 0x40011400 /* 0x40011400-0x400117ff: USART6 */ #define STM32_ADC_BASE 0x40012000 /* 0x40012000-0x400123ff: ADC1-3 */ +# define STM32_ADC1_BASE 0x40012000 /* ADC1 */ +# define STM32_ADC2_BASE 0x40012100 /* ADC2 */ +# define STM32_ADC3_BASE 0x40012200 /* ADC3 */ +# define STM32_ADCCMN_BASE 0x40012300 /* Common */ #define STM32_SDIO_BASE 0x40012c00 /* 0x40012c00-0x40012fff: SDIO */ #define STM32_SPI1_BASE 0x40013000 /* 0x40013000-0x400133ff: SPI1 */ #define STM32_SYSCFG_BASE 0x40013800 /* 0x40013800-0x40013bff: SYSCFG */ |