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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-09 15:03:49 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-09 15:03:49 +0000 |
| commit | 9f1b0571589985f9aaed28f12a0af9c55c56a0c1 (patch) | |
| tree | d96a6dcb40417d6a69639444f9c111846076e89d /nuttx/arch/arm/src/stm32/chip | |
| parent | 04701a1a031e14674a6f98f235b84f60e27b139a (diff) | |
| download | px4-nuttx-9f1b0571589985f9aaed28f12a0af9c55c56a0c1.tar.gz px4-nuttx-9f1b0571589985f9aaed28f12a0af9c55c56a0c1.tar.bz2 px4-nuttx-9f1b0571589985f9aaed28f12a0af9c55c56a0c1.zip | |
Removed stm32_internal.h; Changes for clean compile of STM32F3Discovery configuration with SPI and USB
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5630 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/chip')
4 files changed, 9 insertions, 8 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_usbdev.h b/nuttx/arch/arm/src/stm32/chip/stm32_usbdev.h index daa9a926e..55ab9a93d 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32_usbdev.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32_usbdev.h @@ -43,7 +43,7 @@ #include <nuttx/config.h> #include <chip.h> -#ifdef CONFIG_STM32_STM32F10XX +#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) /************************************************************************************ * Definitions @@ -108,7 +108,7 @@ /* Buffer Descriptor Table (Relatative to BTABLE address) */ -#define STM32_USB_BTABLE_ADDR(ep,o) (STM32_USBCANRAM_BASE+STM32_USB_BTABLE_RADDR(ep,o)) +#define STM32_USB_BTABLE_ADDR(ep,o) (STM32_USBRAM_BASE+STM32_USB_BTABLE_RADDR(ep,o)) #define STM32_USB_ADDR_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_TX_WOFFSET) #define STM32_USB_COUNT_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_COUNT_TX_WOFFSET) #define STM32_USB_ADDR_RX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_RX_WOFFSET) @@ -231,6 +231,6 @@ #define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */ #define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT) -#endif /* CONFIG_STM32_STM32F10XX */ +#endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F10XX */ #endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_USBDEV_H */ diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h b/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h index a1d2e26d3..c405a6dea 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 3013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -79,7 +79,8 @@ #define STM32_I2C1_BASE 0x40005400 /* 0x40005400 - 0x400057ff: I2C1 */ #define STM32_I2C2_BASE 0x40005800 /* 0x40005800 - 0x40005Bff: I2C2 */ #define STM32_USB_BASE 0x40005c00 /* 0x40005c00 - 0x40005fff: USB device FS registers */ -#define STM32_USBCANRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */ +#define STM32_USBRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */ +#define STM32_CANRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */ #define STM32_CAN1_BASE 0x40006400 /* 0x40006400 - 0x400067ff: bxCAN1 */ #define STM32_CAN2_BASE 0x40006800 /* 0x40006800 - 0x40006bff: bxCAN2 */ #define STM32_BKP_BASE 0x40006c00 /* 0x40006c00 - 0x40006fff: Backup registers (BKP) */ diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h index 88fe693f1..5fd8288bb 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_memorymap.h @@ -99,7 +99,7 @@ #define STM32_I2C1_BASE 0x40005400 /* 0x40005400-0x400057ff I2C1 */ #define STM32_I2C2_BASE 0x40005800 /* 0x40005800-0x40005bff I2C2 */ #define STM32_USB_BASE 0x40005c00 /* 0x40005c00-0x40005fff USB device FS */ -#define STM32_USBSRAM_BASE 0x40006000 /* 0x40006000-0x400063ff USB SRAM 512B */ +#define STM32_USBRAM_BASE 0x40006000 /* 0x40006000-0x400063ff USB SRAM 512B */ #define STM32_CAN1_BASE 0x40006400 /* 0x40006400-0x400067ff bxCAN */ #define STM32_PWR_BASE 0x40007000 /* 0x40007000-0x400073ff PWR */ #define STM32_DAC_BASE 0x40007400 /* 0x40007400-0x400077ff DAC (dual) */ diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_syscfg.h b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_syscfg.h index 81ba2eaa4..391f87531 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_syscfg.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f30xxx_syscfg.h @@ -92,8 +92,8 @@ #define SYSCFG_CFGR1_TIM17_DMARMP (1 << 12) /* Bit 12: TIM17 DMA request remapping bit */ #define SYSCFG_CFGR1_TIM6_DMARMP (1 << 13) /* Bit 13: TIM6 DMA remap, or */ #define SYSCFG_CFGR1_DAC1_DMARMP (1 << 13) /* Bit 13: DAC channel DMA remap */ -#define SYSCFG_CFGR1_TIM7_DMARMP (1 << 14) /* Bit 14: : TIM7 DMA remap */ -#define SYSCFG_CFGR1_DAC2_DMARMP (1 << 14) /* Bit 14: : DAC channel2 DMA remap */ +#define SYSCFG_CFGR1_TIM7_DMARMP (1 << 14) /* Bit 14: TIM7 DMA remap */ +#define SYSCFG_CFGR1_DAC2_DMARMP (1 << 14) /* Bit 14: DAC channel2 DMA remap */ #define SYSCFG_CFGR1_I2C_PBXFMP_SHIFT (0) /* Bits 16-19: Fast Mode Plus (FM+) driving capability */ #define SYSCFG_CFGR1_I2C_PBXFMP_MASK (15 << SYSCFG_CFGR1_I2C_PBXFMP_SHIFT) #define SYSCFG_CFGR1_I2C1_FMP (1 << 20) /* Bit 20: I2C1 fast mode Plus driving capability */ |