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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 19:29:41 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 19:29:41 +0000 |
commit | b03d1197ae95ef880475e7e4f98e1b8a78340a66 (patch) | |
tree | 8773c363dc3d1aa855024325ff36c1fb1bdf16ce /nuttx/arch/arm/src/stm32/stm32_dac.c | |
parent | c41819ee0fa00a0741388d2b02edb370a1360a30 (diff) | |
download | px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.tar.gz px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.tar.bz2 px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.zip |
Add framework for lower half STM32 PWM driver; updates to the STM32 ADC driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4192 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_dac.c')
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_dac.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_dac.c b/nuttx/arch/arm/src/stm32/stm32_dac.c index 8d152c57f..ad767371f 100644 --- a/nuttx/arch/arm/src/stm32/stm32_dac.c +++ b/nuttx/arch/arm/src/stm32/stm32_dac.c @@ -172,49 +172,49 @@ #ifdef CONFIG_STM32_DAC1_DMA # if CONFIG_STM32_DAC1_TIMER == 6 -# ifndef CONFIG_STM32_TIM6 -# error "CONFIG_STM32_TIM6 required for DAC1" +# ifndef CONFIG_STM32_TIM6_DAC +# error "CONFIG_STM32_TIM6_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM6 # define DAC1_TIMER_BASE STM32_TIM6_BASE # define DAC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC1_TIMER == 3 && defined(CONFIG_STM32_CONNECTIVITYLINE) -# ifndef CONFIG_STM32_TIM3 -# error "CONFIG_STM32_TIM3 required for DAC1" +# ifndef CONFIG_STM32_TIM3_DAC +# error "CONFIG_STM32_TIM3_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM3 # define DAC1_TIMER_BASE STM32_TIM3_BASE # define DAC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC1_TIMER == 8 && !defined(CONFIG_STM32_CONNECTIVITYLINE) -# ifndef CONFIG_STM32_TIM8 -# error "CONFIG_STM32_TIM8 required for DAC1" +# ifndef CONFIG_STM32_TIM8_DAC +# error "CONFIG_STM32_TIM8_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM8 # define DAC1_TIMER_BASE STM32_TIM8_BASE # define DAC1_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY # elif CONFIG_STM32_DAC1_TIMER == 7 -# ifndef CONFIG_STM32_TIM7 -# error "CONFIG_STM32_TIM7 required for DAC1" +# ifndef CONFIG_STM32_TIM7_DAC +# error "CONFIG_STM32_TIM7_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM7 # define DAC1_TIMER_BASE STM32_TIM7_BASE # elif CONFIG_STM32_DAC1_TIMER == 5 -# ifndef CONFIG_STM32_TIM5 -# error "CONFIG_STM32_TIM5 required for DAC1" +# ifndef CONFIG_STM32_TIM5_DAC +# error "CONFIG_STM32_TIM5_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM5 # define DAC1_TIMER_BASE STM32_TIM5_BASE # define DAC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC1_TIMER == 2 -# ifndef CONFIG_STM32_TIM2 -# error "CONFIG_STM32_TIM2 required for DAC1" +# ifndef CONFIG_STM32_TIM2_DAC +# error "CONFIG_STM32_TIM2_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM2 # define DAC1_TIMER_BASE STM32_TIM2_BASE # define DAC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC1_TIMER == 4 -# ifndef CONFIG_STM32_TIM4 -# error "CONFIG_STM32_TIM4 required for DAC1" +# ifndef CONFIG_STM32_TIM4_DAC +# error "CONFIG_STM32_TIM4_DAC required for DAC1" # endif # define DAC1_TSEL_VALUE DAC_CR_TSEL_TIM4 # define DAC1_TIMER_BASE STM32_TIM4_BASE @@ -228,50 +228,50 @@ #ifdef CONFIG_STM32_DAC2_DMA # if CONFIG_STM32_DAC2_TIMER == 6 -# ifndef CONFIG_STM32_TIM6 -# error "CONFIG_STM32_TIM6 required for DAC2" +# ifndef CONFIG_STM32_TIM6_DAC +# error "CONFIG_STM32_TIM6_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM6 # define DAC2_TIMER_BASE STM32_TIM6_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 3 && defined(CONFIG_STM32_CONNECTIVITYLINE) -# ifndef CONFIG_STM32_TIM3 -# error "CONFIG_STM32_TIM3 required for DAC2" +# ifndef CONFIG_STM32_TIM3_DAC +# error "CONFIG_STM32_TIM3_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM3 # define DAC2_TIMER_BASE STM32_TIM3_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 8 && !defined(CONFIG_STM32_CONNECTIVITYLINE) -# ifndef CONFIG_STM32_TIM8 -# error "CONFIG_STM32_TIM8 required for DAC2" +# ifndef CONFIG_STM32_TIM8_DAC +# error "CONFIG_STM32_TIM8_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM8 # define DAC2_TIMER_BASE STM32_TIM8_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 7 -# ifndef CONFIG_STM32_TIM7 -# error "CONFIG_STM32_TIM7 required for DAC2" +# ifndef CONFIG_STM32_TIM7_DAC +# error "CONFIG_STM32_TIM7_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM7 # define DAC2_TIMER_BASE STM32_TIM7_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 5 -# ifndef CONFIG_STM32_TIM5 -# error "CONFIG_STM32_TIM5 required for DAC2" +# ifndef CONFIG_STM32_TIM5_DAC +# error "CONFIG_STM32_TIM5_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM5 # define DAC2_TIMER_BASE STM32_TIM5_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 2 -# ifndef CONFIG_STM32_TIM2 -# error "CONFIG_STM32_TIM2 required for DAC2" +# ifndef CONFIG_STM32_TIM2_DAC +# error "CONFIG_STM32_TIM2_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM2 # define DAC2_TIMER_BASE STM32_TIM2_BASE # define DAC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY # elif CONFIG_STM32_DAC2_TIMER == 4 -# ifndef CONFIG_STM32_TIM4 -# error "CONFIG_STM32_TIM4 required for DAC2" +# ifndef CONFIG_STM32_TIM4_DAC +# error "CONFIG_STM32_TIM4_DAC required for DAC2" # endif # define DAC2_TSEL_VALUE DAC_CR_TSEL_TIM4 # define DAC2_TIMER_BASE STM32_TIM4_BASE |