diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-07 18:27:47 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-07 18:27:47 +0000 |
| commit | 19b930ec0781b037b3b7fdde0a0fddc798861fe8 (patch) | |
| tree | df4cf18368bdbafccac69631b5ab8470a78cf59c /nuttx/arch/arm/src/stm32/stm32_gpio.c | |
| parent | b5f347def1e037ee724266e1366ff1c66d5ebd9d (diff) | |
| download | px4-nuttx-19b930ec0781b037b3b7fdde0a0fddc798861fe8.tar.gz px4-nuttx-19b930ec0781b037b3b7fdde0a0fddc798861fe8.tar.bz2 px4-nuttx-19b930ec0781b037b3b7fdde0a0fddc798861fe8.zip | |
Fixes for STM32 F3 GPIO, pinmap, DMA, and heap allocation
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5621 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_gpio.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_gpio.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_gpio.c b/nuttx/arch/arm/src/stm32/stm32_gpio.c index 1dedd7ce7..ae96c30c9 100644 --- a/nuttx/arch/arm/src/stm32/stm32_gpio.c +++ b/nuttx/arch/arm/src/stm32/stm32_gpio.c @@ -54,7 +54,7 @@ #include "chip.h" #include "stm32_gpio.h" -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) # include "chip/stm32_syscfg.h" #endif @@ -401,7 +401,7 @@ int stm32_configgpio(uint32_t cfgset) * Name: stm32_configgpio (for the STM2F20xxx and STM32F40xxx family) ****************************************************************************/ -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) int stm32_configgpio(uint32_t cfgset) { uintptr_t base; @@ -539,9 +539,15 @@ int stm32_configgpio(uint32_t cfgset) setting = GPIO_OSPEED_50MHz; break; +#ifndef CONFIG_STM32_STM32F30XX case GPIO_SPEED_100MHz: /* 100 MHz High speed output */ setting = GPIO_OSPEED_100MHz; break; +#else + default: + setting = GPIO_OSPEED_50MHz; + break; +#endif } } else @@ -639,7 +645,7 @@ int stm32_unconfiggpio(uint32_t cfgset) cfgset &= GPIO_PORT_MASK | GPIO_PIN_MASK; #if defined(CONFIG_STM32_STM32F10XX) cfgset |= GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT; -#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) cfgset |= GPIO_INPUT | GPIO_FLOAT; #else # error "Unsupported STM32 chip" @@ -663,7 +669,7 @@ void stm32_gpiowrite(uint32_t pinset, bool value) uint32_t base; #if defined(CONFIG_STM32_STM32F10XX) uint32_t offset; -#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) uint32_t bit; #endif unsigned int port; @@ -695,7 +701,7 @@ void stm32_gpiowrite(uint32_t pinset, bool value) putreg32((1 << pin), base + offset); -#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F40XX) if (value) { |