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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-09-22 22:25:21 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-09-22 22:25:21 +0000 |
| commit | 5987a3825e81c2338497df61081d294ac4d16ae1 (patch) | |
| tree | a9f257e39b14b18f9f10f76216689736aa81078a /nuttx/arch/arm/src/stm32/stm32_gpio.c | |
| parent | cabf873bfd10289dd5a1fd82fd431ec12ed908a8 (diff) | |
| download | px4-nuttx-5987a3825e81c2338497df61081d294ac4d16ae1.tar.gz px4-nuttx-5987a3825e81c2338497df61081d294ac4d16ae1.tar.bz2 px4-nuttx-5987a3825e81c2338497df61081d294ac4d16ae1.zip | |
Add missing STM32 F1 pin remapping definitions
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5180 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_gpio.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_gpio.c | 67 |
1 files changed, 37 insertions, 30 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_gpio.c b/nuttx/arch/arm/src/stm32/stm32_gpio.c index 143e48a2c..4703e8208 100644 --- a/nuttx/arch/arm/src/stm32/stm32_gpio.c +++ b/nuttx/arch/arm/src/stm32/stm32_gpio.c @@ -124,14 +124,27 @@ static inline void stm32_gpioremap(void) uint32_t val = 0; -#ifdef CONFIG_STM32_JTAG_FULL_ENABLE - /* The reset default */ -#elif CONFIG_STM32_JTAG_NOJNTRST_ENABLE - val |= AFIO_MAPR_SWJ; /* enabled but without JNTRST */ -#elif CONFIG_STM32_JTAG_SW_ENABLE - val |= AFIO_MAPR_SWDP; /* set JTAG-DP disabled and SW-DP enabled */ -#else - val |= AFIO_MAPR_DISAB; /* set JTAG-DP and SW-DP Disabled */ +#ifdef CONFIG_STM32_SPI1_REMAP + val |= AFIO_MAPR_SPI1_REMAP; +#endif +#ifdef CONFIG_STM32_SPI3_REMAP +#endif + +#ifdef CONFIG_STM32_I2C1_REMAP + val |= AFIO_MAPR_I2C1_REMAP; +#endif + +#ifdef CONFIG_STM32_USART1_REMAP + val |= AFIO_MAPR_USART1_REMAP; +#endif +#ifdef CONFIG_STM32_USART2_REMAP + val |= AFIO_MAPR_USART2_REMAP; +#endif +#ifdef CONFIG_STM32_USART3_FULL_REMAP + val |= AFIO_MAPR_USART3_FULLREMAP; +#endif +#ifdef CONFIG_STM32_USART3_PARTIAL_REMAP + val |= AFIO_MAPR_USART3_PARTREMAP; #endif #ifdef CONFIG_STM32_TIM1_FULL_REMAP @@ -159,34 +172,28 @@ static inline void stm32_gpioremap(void) val |= AFIO_MAPR_TIM4_REMAP; #endif -#ifdef CONFIG_STM32_USART1_REMAP - val |= AFIO_MAPR_USART1_REMAP; -#endif -#ifdef CONFIG_STM32_USART2_REMAP - val |= AFIO_MAPR_USART2_REMAP; +#ifdef CONFIG_STM32_CAN1_REMAP1 + val |= AFIO_MAPR_PB89; #endif -#ifdef CONFIG_STM32_USART3_FULL_REMAP - val |= AFIO_MAPR_USART3_FULLREMAP; +#ifdef CONFIG_STM32_CAN1_REMAP2 + val |= AFIO_MAPR_PD01; #endif -#ifdef CONFIG_STM32_USART3_PARTIAL_REMAP - val |= AFIO_MAPR_USART3_PARTREMAP; +#ifdef CONFIG_STM32_CAN2_REMAP /* Connectivity line only */ + val |= AFIO_MAPR_CAN2_REMAP; #endif -#ifdef CONFIG_STM32_SPI1_REMAP - val |= AFIO_MAPR_SPI1_REMAP; -#endif -#ifdef CONFIG_STM32_SPI3_REMAP +#ifdef CONFIG_STM32_ETH_REMAP /* Connectivity line only */ + val |= AFIO_MAPR_ETH_REMAP; #endif -#ifdef CONFIG_STM32_I2C1_REMAP - val |= AFIO_MAPR_I2C1_REMAP; -#endif - -#ifdef CONFIG_STM32_CAN1_REMAP1 - val |= AFIO_MAPR_PB89; -#endif -#ifdef CONFIG_STM32_CAN1_REMAP2 - val |= AFIO_MAPR_PD01; +#ifdef CONFIG_STM32_JTAG_FULL_ENABLE + /* The reset default */ +#elif CONFIG_STM32_JTAG_NOJNTRST_ENABLE + val |= AFIO_MAPR_SWJ; /* enabled but without JNTRST */ +#elif CONFIG_STM32_JTAG_SW_ENABLE + val |= AFIO_MAPR_SWDP; /* set JTAG-DP disabled and SW-DP enabled */ +#else + val |= AFIO_MAPR_DISAB; /* set JTAG-DP and SW-DP Disabled */ #endif putreg32(val, STM32_AFIO_MAPR); |