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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-11 19:52:20 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-11 19:52:20 +0000 |
| commit | 58278ea5cfe0d7bf7bdba285052d506c6cc677f3 (patch) | |
| tree | 4455652298bcc4d204d17222dddd709481252b4c /nuttx/arch/arm/src/stm32/stm32_lowputc.c | |
| parent | dbda6f5f4a9f9175500e1db3641245be6f9fd3ac (diff) | |
| download | px4-nuttx-58278ea5cfe0d7bf7bdba285052d506c6cc677f3.tar.gz px4-nuttx-58278ea5cfe0d7bf7bdba285052d506c6cc677f3.tar.bz2 px4-nuttx-58278ea5cfe0d7bf7bdba285052d506c6cc677f3.zip | |
Basic USART setup works
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2126 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_lowputc.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_lowputc.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_lowputc.c b/nuttx/arch/arm/src/stm32/stm32_lowputc.c index da6cdc138..692ef679a 100644 --- a/nuttx/arch/arm/src/stm32/stm32_lowputc.c +++ b/nuttx/arch/arm/src/stm32/stm32_lowputc.c @@ -220,11 +220,11 @@ void up_lowputc(char ch) #ifdef HAVE_CONSOLE /* Wait until the TX FIFO is not full */ - while ((getreg16(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & USART_SR_TXE) != 0); + while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & USART_SR_TXE) == 0); /* Then send the character */ - putreg16((uint16)ch, STM32_CONSOLE_BASE + STM32_USART_DR_OFFSET); + putreg32((uint32)ch, STM32_CONSOLE_BASE + STM32_USART_DR_OFFSET); #endif } @@ -330,24 +330,24 @@ void stm32_lowsetup(void) #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_USART_CONFIG) /* Configure CR2 */ - cr = getreg16(STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); + cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); cr &= ~USART_CR2_CLRBITS; cr |= USART_CR2_SETBITS; - putreg16(cr, STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); + putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); /* Configure CR1 */ - cr = getreg16(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); + cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); cr &= ~USART_CR1_CLRBITS; cr |= USART_CR1_SETBITS; - putreg16(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); + putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); /* Configure CR3 */ - cr = getreg16(STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET); + cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET); cr &= ~USART_CR3_CLRBITS; cr |= USART_CR3_SETBITS; - putreg16(cr, STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET); + putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR3_OFFSET); /* Configure the USART Baud Rate */ @@ -355,9 +355,9 @@ void stm32_lowsetup(void) /* Enable Rx, Tx, and the USART */ - cr = getreg16(STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); + cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE); - putreg16(cr, STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET); + putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); #endif #endif /* CONFIG_STM32_USART1 || CONFIG_STM32_USART2 || CONFIG_STM32_USART3 */ } |