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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-11 16:01:18 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-11 16:01:18 +0000 |
| commit | d8ccf3795d3ea5a60c8d9a5296091f538afbbe82 (patch) | |
| tree | 7914f4d3491b05015565a2b7285c355b8295ae4e /nuttx/arch/arm/src/stm32/stm32_pwm.c | |
| parent | c9b7fefdae9c6d234f201f2f1311c24664f62f1a (diff) | |
| download | px4-nuttx-d8ccf3795d3ea5a60c8d9a5296091f538afbbe82.tar.gz px4-nuttx-d8ccf3795d3ea5a60c8d9a5296091f538afbbe82.tar.bz2 px4-nuttx-d8ccf3795d3ea5a60c8d9a5296091f538afbbe82.zip | |
For STM32 PWM output on TIM1/8, need to set master output enable (MOE)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4296 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_pwm.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_pwm.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwm.c b/nuttx/arch/arm/src/stm32/stm32_pwm.c index 83f996761..dea64c7d9 100644 --- a/nuttx/arch/arm/src/stm32/stm32_pwm.c +++ b/nuttx/arch/arm/src/stm32/stm32_pwm.c @@ -825,6 +825,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, #if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM) if (priv->timtype == TIMTYPE_ADVANCED) { + uint16_t bdtr; + /* Reset output N polarity level, output N state, output compare state, * output compare N idle state. */ @@ -841,6 +843,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, cr2 &= ~(ATIM_CR2_OIS1 | ATIM_CR2_OIS1N | ATIM_CR2_OIS2 | ATIM_CR2_OIS2N | ATIM_CR2_OIS3 | ATIM_CR2_OIS3N | ATIM_CR2_OIS4); + + /* Set the main output enable (MOE) bit and clear the OSSI and OSSR + * bits in the BDTR register. + */ + + bdtr = pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET); + bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR); + bdtr |= ATIM_BDTR_MOE; + pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, bdtr); } #ifdef CONFIG_STM32_STM32F40XX else |