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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-14 19:12:00 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-14 19:12:00 +0000 |
| commit | 73029f78d3b571f32d73ed4a7014d2c1ac2bde36 (patch) | |
| tree | c1ce30a79b10c930446ec6f7455dfed3d7c905be /nuttx/arch/arm/src/stm32/stm32_pwr.c | |
| parent | 8d4650b7597e5653bd1fb67fc7212793967d0673 (diff) | |
| download | px4-nuttx-73029f78d3b571f32d73ed4a7014d2c1ac2bde36.tar.gz px4-nuttx-73029f78d3b571f32d73ed4a7014d2c1ac2bde36.tar.bz2 px4-nuttx-73029f78d3b571f32d73ed4a7014d2c1ac2bde36.zip | |
STM32 F4 RTC driver is fully coded (but not tested)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4176 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_pwr.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_pwr.c | 40 |
1 files changed, 22 insertions, 18 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwr.c b/nuttx/arch/arm/src/stm32/stm32_pwr.c index 861d32b64..6a4e62d66 100644 --- a/nuttx/arch/arm/src/stm32/stm32_pwr.c +++ b/nuttx/arch/arm/src/stm32/stm32_pwr.c @@ -33,13 +33,9 @@ * ************************************************************************************/ -/** \file - * \author Uros Platise - * \brief STM32 Power - * - * \addtogroup STM32_PWR - * \{ - */ +/************************************************************************************ + * Included Files + ************************************************************************************/ #include <nuttx/config.h> #include <nuttx/arch.h> @@ -50,7 +46,6 @@ #include "up_arch.h" #include "stm32_pwr.h" - #if defined(CONFIG_STM32_PWR) /************************************************************************************ @@ -59,32 +54,41 @@ static inline uint16_t stm32_pwr_getreg(uint8_t offset) { - return getreg32(STM32_PWR_BASE + offset); + return getreg32(STM32_PWR_BASE + offset); } - static inline void stm32_pwr_putreg(uint8_t offset, uint16_t value) { - putreg32(value, STM32_PWR_BASE + offset); + putreg32(value, STM32_PWR_BASE + offset); } - static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint16_t setbits) { - modifyreg32(STM32_PWR_BASE + offset, clearbits, setbits); + modifyreg32(STM32_PWR_BASE + offset, clearbits, setbits); } - +/************************************************************************************ + * Public Functions + ************************************************************************************/ /************************************************************************************ - * Public Function - Initialization + * Name: stm32_pwr_enablebkp + * + * Description: + * Enables access to the backup domain (RTC registers, RTC backup data registers + * and backup SRAM). + * + * Input Parameters: + * None + * + * Returned Values: + * None + * ************************************************************************************/ void stm32_pwr_enablebkp(void) { - stm32_pwr_modifyreg(STM32_PWR_CR_OFFSET, 0, PWR_CR_DBP); + stm32_pwr_modifyreg(STM32_PWR_CR_OFFSET, 0, PWR_CR_DBP); } - #endif // defined(CONFIG_STM32_PWR) -/** \} */ |