STM32L152: Better LOOPSPERMSEC; Need to set higher performance VOS

1 files changed, 49 insertions, 4 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32_pwr.c b/nuttx/arch/arm/src/stm32/stm32_pwr.c
index 14149922f..1c9513541 100644
--- a/nuttx/arch/arm/src/stm32/stm32_pwr.c
+++ b/nuttx/arch/arm/src/stm32/stm32_pwr.c
@@ -2,7 +2,9 @@
  * arch/arm/src/stm32/stm32_pwr.c
  *
  *   Copyright (C) 2011 Uros Platise. All rights reserved.
- *   Author: Uros Platise <uros.platise@isotel.eu>
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Authors: Uros Platise <uros.platise@isotel.eu>
+ *            Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -58,17 +60,17 @@
 
 static inline uint16_t stm32_pwr_getreg(uint8_t offset)
 {
-  return getreg32(STM32_PWR_BASE + offset);
+  return (uint16_t)getreg32(STM32_PWR_BASE + (uint32_t)offset);
 }
 
 static inline void stm32_pwr_putreg(uint8_t offset, uint16_t value)
 {
-  putreg32(value, STM32_PWR_BASE + offset);
+  putreg32((uint32_t)value, STM32_PWR_BASE + (uint32_t)offset);
 }
 
 static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits, uint16_t setbits)
 {
-  modifyreg32(STM32_PWR_BASE + offset, clearbits, setbits);
+  modifyreg32(STM32_PWR_BASE + (uint32_t)offset, (uint32_t)clearbits, (uint32_t)setbits);
 }
 
 /************************************************************************************
@@ -95,4 +97,47 @@ void stm32_pwr_enablebkp(void)
   stm32_pwr_modifyreg(STM32_PWR_CR_OFFSET, 0, PWR_CR_DBP);
 }
 
+/************************************************************************************
+ * Name: stm32_pwr_setvos
+ *
+ * Description:
+ *   Set voltage scaling for EneryLite devices.
+ *
+ * Input Parameters:
+ *   vos - Properly aligned voltage scaling select bits for the PWR_CR register.
+ *
+ * Returned Values:
+ *   None
+ *
+ * Assumptions:
+ *   At present, this function is called only from initialization logic.  If used
+ *   for any other purpose that protection to assure that its operation is atomic
+ *   will be required.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_STM32_ENERGYLITE
+void stm32_pwr_setvos(uint16_t vos)
+{
+  uint16_t regval;
+
+  /* The following sequence is required to program the voltage regulator ranges:
+   * 1. Check VDD to identify which ranges are allowed...
+   * 2. Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0.
+   * 3. Configure the voltage scaling range by setting the VOS bits in the PWR_CR
+   *    register.
+   * 4. Poll VOSF bit of in PWR_CSR register. Wait until it is reset to 0.
+   */
+
+  while((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
+
+  regval  = stm32_pwr_getreg(STM32_PWR_CR_OFFSET);
+  regval &= ~PWR_CR_VOS_MASK;
+  regval |= (vos & PWR_CR_VOS_MASK);
+  stm32_pwr_putreg(STM32_PWR_CR_OFFSET, regval);
+
+  while((stm32_pwr_getreg(STM32_PWR_CSR_OFFSET) & PWR_CSR_VOSF) != 0);
+}
+#endif
+
 #endif /* CONFIG_STM32_PWR */