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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-03-28 15:01:43 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-03-28 15:01:43 +0000 |
| commit | 82fb23b2cc78fade702316d00510efcf9d65954f (patch) | |
| tree | a997a6f40b080a1e31890359dde9fc466e726221 /nuttx/arch/arm/src/stm32/stm32_rcc.c | |
| parent | b197eb1609652b2b766bb79caf00b23ef07eed40 (diff) | |
| download | px4-nuttx-82fb23b2cc78fade702316d00510efcf9d65954f.tar.gz px4-nuttx-82fb23b2cc78fade702316d00510efcf9d65954f.tar.bz2 px4-nuttx-82fb23b2cc78fade702316d00510efcf9d65954f.zip | |
More changes from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3431 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_rcc.c')
| -rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_rcc.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.c b/nuttx/arch/arm/src/stm32/stm32_rcc.c index 1b998d858..52e1ac0ae 100755 --- a/nuttx/arch/arm/src/stm32/stm32_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32_rcc.c @@ -164,39 +164,45 @@ static inline void rcc_enableapb1(void) regval = getreg32(STM32_RCC_APB1ENR); #if CONFIG_STM32_TIM2 /* Timer 2 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM2EN; #endif +#endif #if CONFIG_STM32_TIM3 /* Timer 3 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM3EN; #endif +#endif #if CONFIG_STM32_TIM4 /* Timer 4 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM4EN; #endif +#endif #if CONFIG_STM32_TIM5 /* Timer 5 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM5EN; #endif +#endif #if CONFIG_STM32_TIM6 /* Timer 6 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM6EN; #endif +#endif #if CONFIG_STM32_TIM7 /* Timer 7 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_TIM7EN; #endif +#endif #if CONFIG_STM32_WWDG /* Window Watchdog clock enable */ @@ -242,15 +248,17 @@ static inline void rcc_enableapb1(void) #if CONFIG_STM32_I2C1 /* I2C 1 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_I2C1EN; #endif +#endif #if CONFIG_STM32_I2C2 /* I2C 2 clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB1ENR_I2C2EN; #endif +#endif #if CONFIG_STM32_USB /* USB clock enable */ @@ -333,9 +341,10 @@ static inline void rcc_enableapb2(void) #if CONFIG_STM32_TIM1 /* TIM1 Timer clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB2ENR_TIM1EN; #endif +#endif #if CONFIG_STM32_SPI1 /* SPI 1 clock enable */ @@ -345,9 +354,10 @@ static inline void rcc_enableapb2(void) #if CONFIG_STM32_TIM8 /* TIM8 Timer clock enable */ - +#ifdef CONFIG_STM32_FORCEPOWER regval |= RCC_APB2ENR_TIM8EN; #endif +#endif #if CONFIG_STM32_USART1 /* USART1 clock enable */ |