Updates for STM32 F3 SPI and RTC

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5631 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 15 insertions, 9 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32_rtc.c b/nuttx/arch/arm/src/stm32/stm32_rtc.c
index b79a74dcb..5d4e0896e 100644
--- a/nuttx/arch/arm/src/stm32/stm32_rtc.c
+++ b/nuttx/arch/arm/src/stm32/stm32_rtc.c
@@ -65,16 +65,22 @@
  * for the selected STM32 family.  The correct file cannot be selected by
  * the make system because it needs the intelligence that only exists in
  * chip.h that can associate an STM32 part number with an STM32 family.
- *
- * The STM32 F4 RTC differs dramatically the F1 RTC.  The F1 RTC is a simple
- * battery-backed counter; the F4 RTC is provides broken-out data/time in BCD
- * format.
+ */
+
+/* The STM32 F1 has a simple battery-backed counter for its RTC and has a separate
+ * block for the BKP registers.
  */
 
 #if defined(CONFIG_STM32_STM32F10XX)
-#  include "stm32f10xxx_rtc.c"
-#elif defined(CONFIG_STM32_STM32F20XX)
-#  include "stm32f20xxx_rtc.c"
-#elif defined(CONFIG_STM32_STM32F40XX)
-#  include "stm32f40xxx_rtc.c"
+#  include "stm32_rtcounter.c"
+
+/* The other families use a more traditional Realtime Clock/Calendar (RTCC) with
+ * broken-out data/time in BCD format.  The backup registers are integrated into
+ * the RTCC in these families.
+ */
+
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) ||\
+      defined(CONFIG_STM32_STM32F40XX)
+#  include "stm32_rtcc.c"
 #endif
+