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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-09 15:03:49 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-09 15:03:49 +0000
commit9f1b0571589985f9aaed28f12a0af9c55c56a0c1 (patch)
treed96a6dcb40417d6a69639444f9c111846076e89d /nuttx/arch/arm/src/stm32/stm32_serial.c
parent04701a1a031e14674a6f98f235b84f60e27b139a (diff)
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Removed stm32_internal.h; Changes for clean compile of STM32F3Discovery configuration with SPI and USB
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5630 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_serial.c')
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_serial.c78
1 files changed, 71 insertions, 7 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c
index 12da1ee10..30cc4f056 100644
--- a/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -939,6 +939,66 @@ static int up_dma_nextrx(struct up_dev_s *priv)
#ifndef CONFIG_SUPPRESS_UART_CONFIG
static void up_setspeed(struct uart_dev_s *dev)
{
+#ifdef CONFIG_STM32_STM32F30XX
+
+ /* This first implementation is for U[S]ARTs that support oversampling
+ * by 8 in additional to the standard oversampling by 16.
+ */
+
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ uint32_t usartdiv8;
+ uint32_t cr1;
+ uint32_t brr;
+
+ /* In case of oversampling by 8, the equation is:
+ *
+ * baud = 2 * fCK / usartdiv8
+ * usartdiv8 = 2 * fCK / baud
+ */
+
+ usartdiv8 = ((priv->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
+
+ /* Baud rate for standard USART (SPI mode included):
+ *
+ * In case of oversampling by 16, the equation is:
+ * baud = fCK / usartdiv16
+ * usartdiv16 = fCK / baud
+ * = 2 * usartdiv8
+ */
+
+ /* Use oversamply by 8 only if the divisor is small. But what is small? */
+
+ cr1 = up_serialin(priv, STM32_USART_CR1_OFFSET);
+ if (usartdiv8 > 100)
+ {
+ /* Use usartdiv16 */
+
+ brr = (usartdiv8 + 1) >> 1;
+
+ /* Clear oversampling by 8 to enable oversampling by 16 */
+
+ cr1 &= ~USART_CR1_OVER8;
+ }
+ else
+ {
+ /* Perform mysterious operations on bits 0-3 */
+
+ brr = ((usartdiv8 & 0xfff0) | ((usartdiv8 & 0x000f) >> 1));
+
+ /* Set oversampling by 8 */
+
+ cr1 |= USART_CR1_OVER8;
+ }
+
+ up_serialout(priv, STM32_USART_CR1_OFFSET, cr1);
+ up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
+
+#else
+
+ /* This second implementation is for U[S]ARTs that support fractional
+ * dividers.
+ */
+
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
uint32_t usartdiv32;
uint32_t mantissa;
@@ -973,6 +1033,8 @@ static void up_setspeed(struct uart_dev_s *dev)
fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1;
brr |= fraction << USART_BRR_FRAC_SHIFT;
up_serialout(priv, STM32_USART_BRR_OFFSET, brr);
+
+#endif
}
#endif
@@ -1031,6 +1093,7 @@ static int up_setup(struct uart_dev_s *dev)
{
regval |= USART_CR2_STOP2;
}
+
up_serialout(priv, STM32_USART_CR2_OFFSET, regval);
/* Configure CR1 */
@@ -1077,6 +1140,7 @@ static int up_setup(struct uart_dev_s *dev)
regval = up_serialin(priv, STM32_USART_CR1_OFFSET);
regval |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE);
up_serialout(priv, STM32_USART_CR1_OFFSET, regval);
+
#endif
/* Set up the cached interrupt enables value */
@@ -1119,7 +1183,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
/* Configure for circular DMA reception into the RX fifo */
stm32_dmasetup(priv->rxdma,
- priv->usartbase + STM32_USART_DR_OFFSET,
+ priv->usartbase + STM32_USART_RDR_OFFSET,
(uint32_t)priv->rxfifo,
RXDMA_BUFFER_SIZE,
SERIAL_DMA_CONTROL_WORD);
@@ -1351,7 +1415,7 @@ static int up_interrupt_common(struct up_dev_s *priv)
* good byte will be lost.
*/
- (void)up_serialin(priv, STM32_USART_DR_OFFSET);
+ (void)up_serialin(priv, STM32_USART_RDR_OFFSET);
}
/* Handle outgoing, transmit bytes */
@@ -1510,20 +1574,20 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
- uint32_t dr;
+ uint32_t rdr;
/* Get the Rx byte */
- dr = up_serialin(priv, STM32_USART_DR_OFFSET);
+ rdr = up_serialin(priv, STM32_USART_RDR_OFFSET);
/* Get the Rx byte plux error information. Return those in status */
- *status = priv->sr << 16 | dr;
+ *status = priv->sr << 16 | rdr;
priv->sr = 0;
/* Then return the actual received byte */
- return dr & 0xff;
+ return rdr & 0xff;
}
#endif
@@ -1693,7 +1757,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
if (priv->rs485_dir_gpio != 0)
stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
#endif
- up_serialout(priv, STM32_USART_DR_OFFSET, (uint32_t)ch);
+ up_serialout(priv, STM32_USART_TDR_OFFSET, (uint32_t)ch);
}
/****************************************************************************