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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 19:29:41 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-16 19:29:41 +0000 |
commit | b03d1197ae95ef880475e7e4f98e1b8a78340a66 (patch) | |
tree | 8773c363dc3d1aa855024325ff36c1fb1bdf16ce /nuttx/arch/arm/src/stm32/stm32_tim.h | |
parent | c41819ee0fa00a0741388d2b02edb370a1360a30 (diff) | |
download | px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.tar.gz px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.tar.bz2 px4-nuttx-b03d1197ae95ef880475e7e4f98e1b8a78340a66.zip |
Add framework for lower half STM32 PWM driver; updates to the STM32 ADC driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4192 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_tim.h')
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_tim.h | 182 |
1 files changed, 95 insertions, 87 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_tim.h b/nuttx/arch/arm/src/stm32/stm32_tim.h index 1aa18328e..8f12b1875 100644 --- a/nuttx/arch/arm/src/stm32/stm32_tim.h +++ b/nuttx/arch/arm/src/stm32/stm32_tim.h @@ -4,6 +4,11 @@ * Copyright (C) 2011 Uros Platise. All rights reserved. * Author: Uros Platise <uros.platise@isotel.eu> * + * With modifications and updates by: + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -33,14 +38,13 @@ * ************************************************************************************/ -/** \file - * \author Uros Platise - * \brief STM32 Timer Device Driver - */ - #ifndef __ARCH_ARM_SRC_STM32_STM32_TIM_H #define __ARCH_ARM_SRC_STM32_STM32_TIM_H +/************************************************************************************ + * Included Files + ************************************************************************************/ + #include <nuttx/config.h> #include "chip.h" @@ -49,6 +53,22 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ +/* Helpers **************************************************************************/ + +#define STM32_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode)) +#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq)) +#define STM32_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period)) +#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode)) +#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp)) +#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch)) +#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s)) +#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s)) +#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s)) +#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s)) + +/************************************************************************************ + * Public Types + ************************************************************************************/ #ifndef __ASSEMBLY__ @@ -60,119 +80,107 @@ extern "C" { #define EXTERN extern #endif -/************************************************************************************ - * Public Types - ************************************************************************************/ +/* TIM Device Structure */ -/** TIM Device Structure - */ -struct stm32_tim_dev_s { - struct stm32_tim_ops_s *ops; +struct stm32_tim_dev_s +{ + struct stm32_tim_ops_s *ops; }; +/* TIM Modes of Operation */ -/** TIM Modes of Operation - */ -typedef enum { - STM32_TIM_MODE_UNUSED = -1, +typedef enum +{ + STM32_TIM_MODE_UNUSED = -1, - /* One of the following */ - STM32_TIM_MODE_MASK = 0x0310, - STM32_TIM_MODE_DISABLED = 0x0000, - STM32_TIM_MODE_UP = 0x0100, - STM32_TIM_MODE_DOWN = 0x0110, - STM32_TIM_MODE_UPDOWN = 0x0200, - STM32_TIM_MODE_PULSE = 0x0300, + /* One of the following */ + + STM32_TIM_MODE_MASK = 0x0310, + STM32_TIM_MODE_DISABLED = 0x0000, + STM32_TIM_MODE_UP = 0x0100, + STM32_TIM_MODE_DOWN = 0x0110, + STM32_TIM_MODE_UPDOWN = 0x0200, + STM32_TIM_MODE_PULSE = 0x0300, - /* One of the following */ - STM32_TIM_MODE_CK_INT = 0x0000, -// STM32_TIM_MODE_CK_INT_TRIG = 0x0400, -// STM32_TIM_MODE_CK_EXT = 0x0800, -// STM32_TIM_MODE_CK_EXT_TRIG = 0x0C00, - - /* Clock sources, OR'ed with CK_EXT */ -// STM32_TIM_MODE_CK_CHINVALID = 0x0000, -// STM32_TIM_MODE_CK_CH1 = 0x0001, -// STM32_TIM_MODE_CK_CH2 = 0x0002, -// STM32_TIM_MODE_CK_CH3 = 0x0003, -// STM32_TIM_MODE_CK_CH4 = 0x0004 + /* One of the following */ + + STM32_TIM_MODE_CK_INT = 0x0000, +//STM32_TIM_MODE_CK_INT_TRIG = 0x0400, +//STM32_TIM_MODE_CK_EXT = 0x0800, +//STM32_TIM_MODE_CK_EXT_TRIG = 0x0C00, + + /* Clock sources, OR'ed with CK_EXT */ + +//STM32_TIM_MODE_CK_CHINVALID = 0x0000, +//STM32_TIM_MODE_CK_CH1 = 0x0001, +//STM32_TIM_MODE_CK_CH2 = 0x0002, +//STM32_TIM_MODE_CK_CH3 = 0x0003, +//STM32_TIM_MODE_CK_CH4 = 0x0004 - /* Todo: external trigger block */ + /* Todo: external trigger block */ } stm32_tim_mode_t; +/* TIM Channel Modes */ -/** TIM Channel Modes - */ -typedef enum { - STM32_TIM_CH_DISABLED = 0x00, +typedef enum +{ + STM32_TIM_CH_DISABLED = 0x00, - /* Common configuration */ - STM32_TIM_CH_POLARITY_POS = 0x00, - STM32_TIM_CH_POLARITY_NEG = 0x01, + /* Common configuration */ + + STM32_TIM_CH_POLARITY_POS = 0x00, + STM32_TIM_CH_POLARITY_NEG = 0x01, - /* MODES: */ - STM32_TIM_CH_MODE_MASK = 0x06, + /* MODES: */ + + STM32_TIM_CH_MODE_MASK = 0x06, - /* Output Compare Modes */ - STM32_TIM_CH_OUTPWM = 0x04, /** Enable standard PWM mode, active high when counter < compare */ -// STM32_TIM_CH_OUTCOMPARE = 0x06, + /* Output Compare Modes */ + + STM32_TIM_CH_OUTPWM = 0x04, /** Enable standard PWM mode, active high when counter < compare */ +//STM32_TIM_CH_OUTCOMPARE = 0x06, - // TODO other modes ... as PWM capture, ENCODER and Hall Sensor -// STM32_TIM_CH_INCAPTURE = 0x10, -// STM32_TIM_CH_INPWM = 0x20 -// STM32_TIM_CH_DRIVE_OC -- open collector mode + // TODO other modes ... as PWM capture, ENCODER and Hall Sensor +//STM32_TIM_CH_INCAPTURE = 0x10, +//STM32_TIM_CH_INPWM = 0x20 +//STM32_TIM_CH_DRIVE_OC -- open collector mode } stm32_tim_channel_t; +/* TIM Operations */ -/** TIM Operations - */ -struct stm32_tim_ops_s { +struct stm32_tim_ops_s +{ + /* Basic Timers */ - /* Basic Timers */ - - int (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode); - int (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq); - void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint16_t period); + int (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode); + int (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq); + void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint16_t period); - /* General and Advanced Timers Adds */ + /* General and Advanced Timers Adds */ - int (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, stm32_tim_channel_t mode); - int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint16_t compare); - int (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel); - - int (*setisr)(FAR struct stm32_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); - void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source); - void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source); - void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source); + int (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, stm32_tim_channel_t mode); + int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint16_t compare); + int (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel); + + int (*setisr)(FAR struct stm32_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); + void (*enableint)(FAR struct stm32_tim_dev_s *dev, int source); + void (*disableint)(FAR struct stm32_tim_dev_s *dev, int source); + void (*ackint)(FAR struct stm32_tim_dev_s *dev, int source); }; - -/* Helpers */ - -#define STM32_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode)) -#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq)) -#define STM32_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period)) -#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode)) -#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp)) -#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch)) -#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s)) -#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s)) -#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s)) -#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s)) - - /************************************************************************************ * Public Functions ************************************************************************************/ -/** Power-up timer and get its structure */ +/* Power-up timer and get its structure */ + EXTERN FAR struct stm32_tim_dev_s * stm32_tim_init(int timer); -/** Power-down timer, mark it as unused */ -EXTERN int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev); +/* Power-down timer, mark it as unused */ +EXTERN int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev); #undef EXTERN #if defined(__cplusplus) |