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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-13 02:49:10 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-13 02:49:10 +0000 |
commit | cad9ed8e13b1b5e7448f41a71837d0e52ca0ad42 (patch) | |
tree | 78792e9d8701bc3b38f60de71caff9786884c875 /nuttx/arch/arm/src/stm32/stm32_tim.h | |
parent | d455b6a25a41db11963610dca5f4a63eee1a316c (diff) | |
download | px4-nuttx-cad9ed8e13b1b5e7448f41a71837d0e52ca0ad42.tar.gz px4-nuttx-cad9ed8e13b1b5e7448f41a71837d0e52ca0ad42.tar.bz2 px4-nuttx-cad9ed8e13b1b5e7448f41a71837d0e52ca0ad42.zip |
STM32 fixes for F4 32-bit timers
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4300 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_tim.h')
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_tim.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_tim.h b/nuttx/arch/arm/src/stm32/stm32_tim.h index 8f12b1875..081a3489f 100644 --- a/nuttx/arch/arm/src/stm32/stm32_tim.h +++ b/nuttx/arch/arm/src/stm32/stm32_tim.h @@ -6,7 +6,7 @@ * * With modifications and updates by: * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -92,7 +92,7 @@ struct stm32_tim_dev_s typedef enum { STM32_TIM_MODE_UNUSED = -1, - + /* One of the following */ STM32_TIM_MODE_MASK = 0x0310, @@ -101,7 +101,7 @@ typedef enum STM32_TIM_MODE_DOWN = 0x0110, STM32_TIM_MODE_UPDOWN = 0x0200, STM32_TIM_MODE_PULSE = 0x0300, - + /* One of the following */ STM32_TIM_MODE_CK_INT = 0x0000, @@ -116,9 +116,9 @@ typedef enum //STM32_TIM_MODE_CK_CH2 = 0x0002, //STM32_TIM_MODE_CK_CH3 = 0x0003, //STM32_TIM_MODE_CK_CH4 = 0x0004 - + /* Todo: external trigger block */ - + } stm32_tim_mode_t; /* TIM Channel Modes */ @@ -126,26 +126,26 @@ typedef enum typedef enum { STM32_TIM_CH_DISABLED = 0x00, - + /* Common configuration */ STM32_TIM_CH_POLARITY_POS = 0x00, STM32_TIM_CH_POLARITY_NEG = 0x01, - + /* MODES: */ STM32_TIM_CH_MODE_MASK = 0x06, - + /* Output Compare Modes */ STM32_TIM_CH_OUTPWM = 0x04, /** Enable standard PWM mode, active high when counter < compare */ //STM32_TIM_CH_OUTCOMPARE = 0x06, - + // TODO other modes ... as PWM capture, ENCODER and Hall Sensor //STM32_TIM_CH_INCAPTURE = 0x10, //STM32_TIM_CH_INPWM = 0x20 //STM32_TIM_CH_DRIVE_OC -- open collector mode - + } stm32_tim_channel_t; /* TIM Operations */ @@ -156,12 +156,12 @@ struct stm32_tim_ops_s int (*setmode)(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode); int (*setclock)(FAR struct stm32_tim_dev_s *dev, uint32_t freq); - void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint16_t period); - + void (*setperiod)(FAR struct stm32_tim_dev_s *dev, uint32_t period); + /* General and Advanced Timers Adds */ - + int (*setchannel)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, stm32_tim_channel_t mode); - int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint16_t compare); + int (*setcompare)(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint32_t compare); int (*getcapture)(FAR struct stm32_tim_dev_s *dev, uint8_t channel); int (*setisr)(FAR struct stm32_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); |