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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-11-24 01:34:10 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-11-24 01:34:10 +0000 |
| commit | c4bb5210280f599935b85afdf6d8457a5ac5eea4 (patch) | |
| tree | 1bc7b3d10bec5f3f9feffb73a3012e8a31ff7946 /nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c | |
| parent | 8839ea425361f00f162c23f42fdb0364f335226e (diff) | |
| download | px4-nuttx-c4bb5210280f599935b85afdf6d8457a5ac5eea4.tar.gz px4-nuttx-c4bb5210280f599935b85afdf6d8457a5ac5eea4.tar.bz2 px4-nuttx-c4bb5210280f599935b85afdf6d8457a5ac5eea4.zip | |
Finish code for basic STM3240 port
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4124 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c index 73ddc44f0..07dda8a59 100644 --- a/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c @@ -512,31 +512,3 @@ static inline void rcc_enableperipherals(void) /**************************************************************************** * Public Functions ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelse - * - * Todo: - * Check for LSE good timeout and return with -1, - * possible ISR optimization? or at least ISR should be cough in case of failure - * - ****************************************************************************/ - -void stm32_rcc_enablelse(void) -{ - /* Enable LSE */ - - modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON); - - /* We could wait for ISR here ... */ - - while( !(getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) ) up_waste(); - - /* Select LSE as RTC Clock Source */ - - modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE); - - /* Enable Clock */ - - modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN); -} |