Add a test for PWM drivers

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4202 42af7a65-404d-4744-a932-0658087f49c3

3 files changed, 30 insertions, 6 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32_internal.h b/nuttx/arch/arm/src/stm32/stm32_internal.h
index 0c1792230..8db936786 100644
--- a/nuttx/arch/arm/src/stm32/stm32_internal.h
+++ b/nuttx/arch/arm/src/stm32/stm32_internal.h
@@ -2,7 +2,7 @@
  * arch/arm/src/stm32/stm32_internal.h
  *
  *   Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwm.c b/nuttx/arch/arm/src/stm32/stm32_pwm.c
index 3162d31d1..1e3f4f07d 100644
--- a/nuttx/arch/arm/src/stm32/stm32_pwm.c
+++ b/nuttx/arch/arm/src/stm32/stm32_pwm.c
@@ -343,6 +343,8 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
 {
   FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
 
+  pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+
   /* Configure the PWM output pin, but do not start the timer yet */
 
   stm32_configgpio(priv->pincfg);
@@ -370,6 +372,8 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
   FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
   uint32_t pincfg;
 
+  pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+
   /* Make sure that the output has been stopped */
 
   pwm_stop(dev);
@@ -430,6 +434,9 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
   uint16_t ocmode1;
   uint16_t ocmode2;
 
+  pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n",
+          priv->timid, priv->channel, info->frequency, info->duty);
+
   /* Caculate optimal values for the timer prescaler and for the timer reload
    * register.  If' frequency' is the desired frequency, then
    *
@@ -599,6 +606,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
         break;
 
       default:
+        pwmdbg("No such channel: %d\n", priv->channel);
         return -EINVAL;
     }
 
@@ -681,6 +689,10 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
 
   cr1 |= GTIM_CR1_CEN;  
   pwm_putreg(priv, STM32_GTIM_CR1_OFFSET, ccmr2);
+
+  pwmvdbg("CR1: %04x CR2:%04x CCER: %08x CCMR1: %08x CCMR2: %08x\n",
+          cr1, cr2, ccer, ccmr1, ccmr2);
+
   return OK;
 }
 
@@ -706,6 +718,8 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
   uint32_t regaddr;
   uint32_t regval;
 
+  pwmvdbg("TIM%d\n", priv->timid);
+
   switch (priv->timid)
     {
 #ifdef CONFIG_STM32_TIM1_PWM
@@ -792,11 +806,13 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
   regval &= ~resetbit;
   putreg32(regval, regaddr);
+
+  pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
   return OK;
 }
 
 /****************************************************************************
- * Name:
+ * Name: pwm_ioctl
  *
  * Description:
  *   Lower-half logic may support platform-specific ioctl commands
@@ -813,8 +829,13 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
 
 static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
 {
+#ifdef CONFIG_DEBUG_PWM
+  FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
+
   /* There are no platform-specific ioctl commands */
 
+  pwmvdbg("TIM%d\n", priv->timid);
+#endif
   return -ENOTTY;
 }
 
@@ -843,6 +864,8 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
 {
   FAR struct stm32_pwmtimer_s *lower;
 
+  pwmvdbg("TIM%d\n", timer);
+
   switch (timer)
     {
 #ifdef CONFIG_STM32_TIM1_PWM
@@ -906,6 +929,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
         break;
 #endif
       default:
+        pwmdbg("No such timer configured\n");
         return NULL;
     }
 
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwm.h b/nuttx/arch/arm/src/stm32/stm32_pwm.h
index bd881d3d4..b7179a7bc 100644
--- a/nuttx/arch/arm/src/stm32/stm32_pwm.h
+++ b/nuttx/arch/arm/src/stm32/stm32_pwm.h
@@ -33,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32_STM32_TIM_H
-#define __ARCH_ARM_SRC_STM32_STM32_TIM_H
+#ifndef __ARCH_ARM_SRC_STM32_STM32_PWM_H
+#define __ARCH_ARM_SRC_STM32_STM32_PWM_H
 
 /* The STM32 does not have dedicated PWM hardware.  Rather, pulsed output control
  * is a capabilitiy of the STM32 timers.  The logic in this file implements the
@@ -303,7 +303,7 @@
 #  endif
 #endif
 
-#ifdef CONFIG_STM32_TIM14_PWM)
+#ifdef CONFIG_STM32_TIM14_PWM
 #  if !defined(CONFIG_STM32_TIM14_CHANNEL)
 #    error "CONFIG_STM32_TIM14_CHANNEL must be provided"
 #  elif CONFIG_STM32_TIM14_CHANNEL == 1
@@ -367,4 +367,4 @@ EXTERN FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer);
 
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_STM32_TIMx_PWM */
-#endif /* __ARCH_ARM_SRC_STM32_STM32_TIM_H */
+#endif /* __ARCH_ARM_SRC_STM32_STM32_PWM_H */