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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-05-15 16:11:16 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-05-15 16:11:16 -0600 |
| commit | 6c769c468563f27a828aad0d0c697becf14ccf15 (patch) | |
| tree | f25fa5c1655e2b2ba0687837f15f555b6149d4fe /nuttx/arch/arm/src/stm32 | |
| parent | e823e78623d957ee0b9d433c111f14add05a317e (diff) | |
| download | px4-nuttx-6c769c468563f27a828aad0d0c697becf14ccf15.tar.gz px4-nuttx-6c769c468563f27a828aad0d0c697becf14ccf15.tar.bz2 px4-nuttx-6c769c468563f27a828aad0d0c697becf14ccf15.zip | |
Fix STM32 F1 DMA register definitions. From Laurent Latil.
Diffstat (limited to 'nuttx/arch/arm/src/stm32')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32f10xxx_dma.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_dma.h b/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_dma.h index 1075b885e..abcfe4d23 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_dma.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f10xxx_dma.h @@ -55,14 +55,14 @@ #define STM32_DMA_ISR_OFFSET 0x0000 /* DMA interrupt status register */ #define STM32_DMA_IFCR_OFFSET 0x0004 /* DMA interrupt flag clear register */ -#define STM32_DMACHAN_OFFSET(n) (0x0008 + 0x0014*(n)) -#define STM32_DMACHAN1_OFFSET 0x0008 -#define STM32_DMACHAN2_OFFSET 0x001c -#define STM32_DMACHAN3_OFFSET 0x0030 -#define STM32_DMACHAN4_OFFSET 0x0044 -#define STM32_DMACHAN5_OFFSET 0x0058 -#define STM32_DMACHAN6_OFFSET 0x006c -#define STM32_DMACHAN7_OFFSET 0x0080 +#define STM32_DMACHAN_OFFSET(n) (0x0014*(n)) +#define STM32_DMACHAN1_OFFSET 0x0000 +#define STM32_DMACHAN2_OFFSET 0x0014 +#define STM32_DMACHAN3_OFFSET 0x0028 +#define STM32_DMACHAN4_OFFSET 0x003c +#define STM32_DMACHAN5_OFFSET 0x0050 +#define STM32_DMACHAN6_OFFSET 0x0064 +#define STM32_DMACHAN7_OFFSET 0x0078 #define STM32_DMACHAN_CCR_OFFSET 0x0008 /* DMA channel configuration register */ #define STM32_DMACHAN_CNDTR_OFFSET 0x000c /* DMA channel number of data register */ |