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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-18 21:10:08 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-03-18 21:10:08 +0000
commitc3998d2feead04441a90dcd45c6a35f8477b7fd6 (patch)
tree236e9eb67fcdb788b9ccb454e931703fe30a74ce /nuttx/arch/arm/src/stm32
parentbef7c0ac3dcfd2277e3df45a5767f27187633bb2 (diff)
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Add support for ram vectors to the ARMv7-M architecture
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5756 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32')
-rw-r--r--nuttx/arch/arm/src/stm32/Make.defs4
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_irq.c8
2 files changed, 11 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/stm32/Make.defs b/nuttx/arch/arm/src/stm32/Make.defs
index aea8719b1..d51c360fe 100644
--- a/nuttx/arch/arm/src/stm32/Make.defs
+++ b/nuttx/arch/arm/src/stm32/Make.defs
@@ -56,6 +56,10 @@ CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
+ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
+CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
+endif
+
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif
diff --git a/nuttx/arch/arm/src/stm32/stm32_irq.c b/nuttx/arch/arm/src/stm32/stm32_irq.c
index 79b8120e9..96b239c36 100644
--- a/nuttx/arch/arm/src/stm32/stm32_irq.c
+++ b/nuttx/arch/arm/src/stm32/stm32_irq.c
@@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
+#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@@ -302,9 +303,14 @@ void up_irqinitialize(void)
* at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
* the vector table will be offset to a different location in FLASH and we
* will need to set the NVIC vector location to this alternative location.
+ *
+ * If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
+ * vector table that requires special initialization.
*/
-#ifdef CONFIG_STM32_DFU
+#if defined(CONFIG_ARCH_RAMVECTORS)
+ up_ramvec_initialize();
+#elif defined(CONFIG_STM32_DFU)
putreg32((uint32_t)stm32_vectors, NVIC_VECTAB);
#endif