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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-10-30 23:35:19 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-10-30 23:35:19 +0000 |
| commit | 6bd496502fdb4e1c651ed07b627ac7159b727d25 (patch) | |
| tree | e15020d8cd9cbdd6ab306d5005e1cd022d796469 /nuttx/arch/arm/src/str71x/str71x_apb.h | |
| parent | 3e32a2d288d69de5fe9c3138b1b516e3f9b16d76 (diff) | |
| download | px4-nuttx-6bd496502fdb4e1c651ed07b627ac7159b727d25.tar.gz px4-nuttx-6bd496502fdb4e1c651ed07b627ac7159b727d25.tar.bz2 px4-nuttx-6bd496502fdb4e1c651ed07b627ac7159b727d25.zip | |
Adding more STR71x logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1105 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/str71x/str71x_apb.h')
| -rw-r--r-- | nuttx/arch/arm/src/str71x/str71x_apb.h | 65 |
1 files changed, 35 insertions, 30 deletions
diff --git a/nuttx/arch/arm/src/str71x/str71x_apb.h b/nuttx/arch/arm/src/str71x/str71x_apb.h index bb8448107..f5453dc2b 100644 --- a/nuttx/arch/arm/src/str71x/str71x_apb.h +++ b/nuttx/arch/arm/src/str71x/str71x_apb.h @@ -48,46 +48,51 @@ * Definitions
************************************************************************************/
-/* APB Registers ********************************************************************/
+/* APB register offsets *************************************************************/
-#define STR71X_APB1_CKDIS (STR71X_APB1_BASE + 0x0010) /* 32-bits wide */
-#define STR71X_APB1_SWRES (STR71X_APB1_BASE + 0x0014) /* 32-bits wide */
+#define STR71X_APB_CKDIS_OFFSET (0x0010) /* 32-bits wide */
+#define STR71X_APB_SWRES_OFFSET (0x0014) /* 32-bits wide */
-#define STR71X_APB2_CKDIS (STR71X_APB2_BASE + 0x0010) /* 32-bits wide */
-#define STR71X_APB2_SWRES (STR71X_APB2_BASE + 0x0014) /* 32-bits wide */
+/* APB register addresses ***********************************************************/
+
+#define STR71X_APB1_CKDIS (STR71X_APB1_BASE + STR71X_APB_CKDIS_OFFSET)
+#define STR71X_APB1_SWRES (STR71X_APB1_BASE + STR71X_APB_SWRES_OFFSET)
+
+#define STR71X_APB2_CKDIS (STR71X_APB2_BASE + STR71X_APB_CKDIS_OFFSET)
+#define STR71X_APB2_SWRES (STR71X_APB2_BASE + STR71X_APB_SWRES_OFFSET)
/* Register bit settings ***********************************************************/
/* APB1 periperals */
-#define STR71X_APB1_I2C0 (0x0001)
-#define STR71X_APB1_I2C1 (0x0002)
-#define STR71X_APB1_UART0 (0x0008)
-#define STR71X_APB1_UART1 (0x0010)
-#define STR71X_APB1_UART2 (0x0020)
-#define STR71X_APB1_UART3 (0x0040)
-#define STR71X_APB1_USB (0x0080)
-#define STR71X_APB1_CAN (0x0100)
-#define STR71X_APB1_BSPI0 (0x0200)
-#define STR71X_APB1_BSPI1 (0x0400)
-#define STR71X_APB1_HDLC (0x2000)
-#define STR71X_APB1_APB1ALL (0x27fb)
+#define STR71X_APB1_I2C0 (0x0001) /* Bit 0: I2C0 */
+#define STR71X_APB1_I2C1 (0x0002) /* Bit 1: I2C1 */
+#define STR71X_APB1_UART0 (0x0008) /* Bit 3: UART0 */
+#define STR71X_APB1_UART1 (0x0010) /* Bit 4: UART1 */
+#define STR71X_APB1_UART2 (0x0020) /* Bit 5: UART2 */
+#define STR71X_APB1_UART3 (0x0040) /* Bit 6: UART3 */
+#define STR71X_APB1_USB (0x0080) /* Bit 7: USB */
+#define STR71X_APB1_CAN (0x0100) /* Bit 8: CAN */
+#define STR71X_APB1_BSPI0 (0x0200) /* Bit 9: BSPI0 */
+#define STR71X_APB1_BSPI1 (0x0400) /* Bit 10: BSPI1 */
+#define STR71X_APB1_HDLC (0x2000) /* Bit 13: HDLC */
+#define STR71X_APB1_APB1ALL (0x27fb)
/* APB2 Peripherals */
-#define STR71X_APB2_XTI (0x0001)
-#define STR71X_APB2_GPIO0 (0x0004)
-#define STR71X_APB2_GPIO1 (0x0008)
-#define STR71X_APB2_GPIO2 (0x0010)
-#define STR71X_APB2_ADC12 (0x0040)
-#define STR71X_APB2_CKOUT (0x0080)
-#define STR71X_APB2_TIM0 (0x0100)
-#define STR71X_APB2_TIM1 (0x0200)
-#define STR71X_APB2_TIM2 (0x0400)
-#define STR71X_APB2_TIM3 (0x0800)
-#define STR71X_APB2_RTC (0x1000)
-#define STR71X_APB2_EIC (0x4000)
-#define STR71X_APB2_APB2ALL (0x5fdd)
+#define STR71X_APB2_XTI (0x0001) /* Bit 0: XTI */
+#define STR71X_APB2_GPIO0 (0x0004) /* Bit 2: IOPORT0 */
+#define STR71X_APB2_GPIO1 (0x0008) /* Bit 3: IOPORT1 */
+#define STR71X_APB2_GPIO2 (0x0010) /* Bit 4: IOPORT2 */
+#define STR71X_APB2_ADC12 (0x0040) /* Bit 6: ADC */
+#define STR71X_APB2_CKOUT (0x0080) /* Bit 7: CKOUT */
+#define STR71X_APB2_TIM0 (0x0100) /* Bit 8: TIMER0 */
+#define STR71X_APB2_TIM1 (0x0200) /* Bit 9: TIMER1 */
+#define STR71X_APB2_TIM2 (0x0400) /* Bit 10: TIMER2 */
+#define STR71X_APB2_TIM3 (0x0800) /* Bit 11: TIMER3 */
+#define STR71X_APB2_RTC (0x1000) /* Bit 12: RTC */
+#define STR71X_APB2_EIC (0x4000) /* Bit 14: EIC */
+#define STR71X_APB2_APB2ALL (0x5fdd)
/************************************************************************************
* Public Types
|