diff options
author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-05 18:48:30 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-05 18:48:30 -0600 |
commit | 303cf6c26e2f96c1909ca977b8ce86b0b761b444 (patch) | |
tree | 6e6f3516510f73fc4ea5ef3cc2032e035c4142f6 /nuttx/arch/arm/src | |
parent | a64d048bd159d1c21859a45954c953c5ce7ff6c2 (diff) | |
download | px4-nuttx-303cf6c26e2f96c1909ca977b8ce86b0b761b444.tar.gz px4-nuttx-303cf6c26e2f96c1909ca977b8ce86b0b761b444.tar.bz2 px4-nuttx-303cf6c26e2f96c1909ca977b8ce86b0b761b444.zip |
Move SAM4L peripheral clock logic to a separate file
Diffstat (limited to 'nuttx/arch/arm/src')
-rw-r--r-- | nuttx/arch/arm/src/sam34/Make.defs | 2 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sam34/chip/sam4l_pm.h | 12 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sam34/sam4l_clockconfig.c | 149 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sam34/sam4l_periphclks.c | 272 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sam34/sam4l_periphclks.h | 349 | ||||
-rw-r--r-- | nuttx/arch/arm/src/sam34/sam_clockconfig.h | 82 |
6 files changed, 634 insertions, 232 deletions
diff --git a/nuttx/arch/arm/src/sam34/Make.defs b/nuttx/arch/arm/src/sam34/Make.defs index 182d4e5bf..6f192960f 100644 --- a/nuttx/arch/arm/src/sam34/Make.defs +++ b/nuttx/arch/arm/src/sam34/Make.defs @@ -83,7 +83,7 @@ CHIP_CSRCS += sam_serial.c sam_start.c sam_timerisr.c # Configuration-dependent SAM3/4 files ifeq ($(CONFIG_ARCH_CHIP_SAM4L),y) -CHIP_CSRCS += sam4l_clockconfig.c sam4l_gpio.c +CHIP_CSRCS += sam4l_clockconfig.c sam4l_periphclks.c sam4l_gpio.c else CHIP_CSRCS += sam3u_clockconfig.c sam3u_gpio.c endif diff --git a/nuttx/arch/arm/src/sam34/chip/sam4l_pm.h b/nuttx/arch/arm/src/sam34/chip/sam4l_pm.h index 16941397c..ba78b3a95 100644 --- a/nuttx/arch/arm/src/sam34/chip/sam4l_pm.h +++ b/nuttx/arch/arm/src/sam34/chip/sam4l_pm.h @@ -186,6 +186,14 @@ #define PM_PBAMASK_TWIM3 (1 << 22) /* Bit 22: TWIM3 */ #define PM_PBAMASK_LCDCA (1 << 23) /* Bit 23: LCDCA*/ +/* These are the PBMA peripherals that use divided clocks enabled in the + * PBADIVMASK register. + */ + +#define PM_PBAMASK_TIMERS (PM_PBAMASK_TC0 | PM_PBAMASK_TC1) +#define PM_PBAMASK_UARTS (PM_PBAMASK_USART0 | PM_PBAMASK_USART1 | \ + PM_PBAMASK_USART2 | PM_PBAMASK_USART3) + /* PBB Mask Register Bit-field Definitions */ #define PM_PBBMASK_FLASHCALW (1 << 0) /* Bit 0: FLASHCALW */ @@ -221,6 +229,10 @@ #define PM_PBADIVMASK_TIMER_CLOCK4 (1 << 4) /* Bit 4: TIMER_CLOCK4 (TC0-1) */ #define PM_PBADIVMASK_TIMER_CLOCK5 (1 << 6) /* Bit 5: TIMER_CLOCK5 (TC0-1) */ +#define PM_PBADIVMASK_TIMER_CLOCKS \ + (PM_PBADIVMASK_TIMER_CLOCK2 | PM_PBADIVMASK_TIMER_CLOCK3 | \ + PM_PBADIVMASK_TIMER_CLOCK4 | PM_PBADIVMASK_TIMER_CLOCK5) + /* Clock Failure Detector Control */ #define PM_CFDCTRL_CFDEN (1 << 0) /* Bit 0: Clock Failure Detection Enable */ diff --git a/nuttx/arch/arm/src/sam34/sam4l_clockconfig.c b/nuttx/arch/arm/src/sam34/sam4l_clockconfig.c index 1bd4dbfed..2857c7fb1 100644 --- a/nuttx/arch/arm/src/sam34/sam4l_clockconfig.c +++ b/nuttx/arch/arm/src/sam34/sam4l_clockconfig.c @@ -569,152 +569,3 @@ void sam_clockconfig(void) void sam_usbclock(); #endif } - -/**************************************************************************** - * Name: sam_modifyperipheral - * - * Description: - * This is a convenience function that is intended to be used to enable - * or disable peripheral module clocking. - * - ****************************************************************************/ - -void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits) -{ - irqstate_t flags; - uint32_t regval; - - /* Make sure that the following operations are atomic */ - - flags = irqsave(); - - /* Enable/disabling clocking */ - - regval = getreg32(regaddr); - regval &= ~clrbits; - regval |= setbits; - putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(regaddr - SAM_PM_BASE), SAM_PM_UNLOCK); - putreg32(regval, regaddr); - - irqrestore(flags); -} - -/**************************************************************************** - * Name: sam_pba_enableperipheral - * - * Description: - * This is a convenience function to enable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -void sam_pba_enableperipheral(uint32_t bitset) -{ - irqstate_t flags; - - /* The following operations must be atomic */ - - flags = irqsave(); - - /* Enable the APBA bridge if necessary */ - - if (getreg32(SAM_PM_PBAMASK) == 0) - { - sam_hsb_enableperipheral(PM_HSBMASK_APBA); - } - - irqrestore(flags); - - /* Enable the module */ - - sam_enableperipheral(SAM_PM_PBAMASK, bitset); -} - -/**************************************************************************** - * Name: sam_pba_disableperipheral - * - * Description: - * This is a convenience function to disable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -void sam_pba_disableperipheral(uint32_t bitset) -{ - irqstate_t flags; - - /* Disable clocking to the module */ - - sam_disableperipheral(SAM_PM_PBAMASK, bitset); - - /* Disable the APBA bridge if possible */ - - flags = irqsave(); - - if (getreg32(SAM_PM_PBAMASK) == 0) - { - sam_hsb_disableperipheral(PM_HSBMASK_APBA); - } - - irqrestore(flags); -} - -/**************************************************************************** - * Name: sam_pbb_enableperipheral - * - * Description: - * This is a convenience function to enable a peripheral on the APBB - * bridge. - * - ****************************************************************************/ - -void sam_pbb_enableperipheral(uint32_t bitset) -{ - irqstate_t flags; - - /* The following operations must be atomic */ - - flags = irqsave(); - - /* Enable the APBB bridge if necessary */ - - if (getreg32(SAM_PM_PBBMASK) == 0) - { - sam_hsb_enableperipheral(PM_HSBMASK_APBB); - } - - irqrestore(flags); - - /* Enable the module */ - - sam_enableperipheral(SAM_PM_PBBMASK, bitset); -} - -/**************************************************************************** - * Name: sam_pbb_disableperipheral - * - * Description: - * This is a convenience function to disable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -void sam_pbb_disableperipheral(uint32_t bitset) -{ - irqstate_t flags; - - /* Disable clocking to the peripheral module */ - - sam_disableperipheral(SAM_PM_PBBMASK, bitset); - - /* Disable the APBB bridge if possible */ - - flags = irqsave(); - - if (getreg32(SAM_PM_PBBMASK) == 0) - { - sam_hsb_disableperipheral(PM_HSBMASK_APBB); - } - - irqrestore(flags); -} diff --git a/nuttx/arch/arm/src/sam34/sam4l_periphclks.c b/nuttx/arch/arm/src/sam34/sam4l_periphclks.c new file mode 100644 index 000000000..abd766695 --- /dev/null +++ b/nuttx/arch/arm/src/sam34/sam4l_periphclks.c @@ -0,0 +1,272 @@ +/**************************************************************************** + * arch/avr/src/sam34/sam4l_periphclks.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * This file is derived from nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <arch/irq.h> +#include <arch/board/board.h> + +#include "up_arch.h" + +#include "up_internal.h" +#include "chip/sam4l_pm.h" + +#include "sam4l_periphclks.h" + +/**************************************************************************** + * Private Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Global Variables + ****************************************************************************/ + +/**************************************************************************** + * Private Variables + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_modifyperipheral + * + * Description: + * This is a convenience function that is intended to be used to enable + * or disable peripheral module clocking. + * + ****************************************************************************/ + +void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits) +{ + irqstate_t flags; + uint32_t regval; + + /* Make sure that the following operations are atomic */ + + flags = irqsave(); + + /* Enable/disabling clocking */ + + regval = getreg32(regaddr); + regval &= ~clrbits; + regval |= setbits; + putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(regaddr - SAM_PM_BASE), SAM_PM_UNLOCK); + putreg32(regval, regaddr); + + irqrestore(flags); +} + +/**************************************************************************** + * Name: sam_pba_modifydivmask + * + * Description: + * This is a convenience function that is intended to be used to modify + * bits in the PBA divided clock (DIVMASK) register. + * + ****************************************************************************/ + +void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits) +{ + irqstate_t flags; + uint32_t regval; + + /* Make sure that the following operations are atomic */ + + flags = irqsave(); + + /* Modify the PBA DIVMASK */ + + regval = getreg32(SAM_PM_PBADIVMASK); + regval &= ~clrbits; + regval |= setbits; + putreg32(PM_UNLOCK_KEY(0xaa) | PM_UNLOCK_ADDR(SAM_PM_PBADIVMASK_OFFSET), SAM_PM_UNLOCK); + putreg32(regval, SAM_PM_PBADIVMASK); + + irqrestore(flags); +} + +/**************************************************************************** + * Name: sam_pba_enableperipheral + * + * Description: + * This is a convenience function to enable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +void sam_pba_enableperipheral(uint32_t bitset) +{ + irqstate_t flags; + + /* The following operations must be atomic */ + + flags = irqsave(); + + /* Enable the APBA bridge if necessary */ + + if (getreg32(SAM_PM_PBAMASK) == 0) + { + sam_hsb_enableperipheral(PM_HSBMASK_APBA); + } + + irqrestore(flags); + + /* Enable the module */ + + sam_enableperipheral(SAM_PM_PBAMASK, bitset); +} + +/**************************************************************************** + * Name: sam_pba_disableperipheral + * + * Description: + * This is a convenience function to disable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +void sam_pba_disableperipheral(uint32_t bitset) +{ + irqstate_t flags; + + /* Disable clocking to the module */ + + sam_disableperipheral(SAM_PM_PBAMASK, bitset); + + /* Disable the APBA bridge if possible */ + + flags = irqsave(); + + if (getreg32(SAM_PM_PBAMASK) == 0) + { + sam_hsb_disableperipheral(PM_HSBMASK_APBA); + } + + /* Disable PBA UART divided clock if none of the UARTS are in use */ + + if ((getreg32(SAM_PM_PBAMASK) & PM_PBAMASK_UARTS) == 0) + { + sam_pba_disabledivmask(PM_PBADIVMASK_CLK_USART); + } + + /* Disable PBA TIMER divided clocks if none of the UARTS are in use */ + + if ((getreg32(SAM_PM_PBAMASK) & PM_PBAMASK_TIMERS) == 0) + { + sam_pba_disabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); + } + + irqrestore(flags); +} + +/**************************************************************************** + * Name: sam_pbb_enableperipheral + * + * Description: + * This is a convenience function to enable a peripheral on the APBB + * bridge. + * + ****************************************************************************/ + +void sam_pbb_enableperipheral(uint32_t bitset) +{ + irqstate_t flags; + + /* The following operations must be atomic */ + + flags = irqsave(); + + /* Enable the APBB bridge if necessary */ + + if (getreg32(SAM_PM_PBBMASK) == 0) + { + sam_hsb_enableperipheral(PM_HSBMASK_APBB); + } + + irqrestore(flags); + + /* Enable the module */ + + sam_enableperipheral(SAM_PM_PBBMASK, bitset); +} + +/**************************************************************************** + * Name: sam_pbb_disableperipheral + * + * Description: + * This is a convenience function to disable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +void sam_pbb_disableperipheral(uint32_t bitset) +{ + irqstate_t flags; + + /* Disable clocking to the peripheral module */ + + sam_disableperipheral(SAM_PM_PBBMASK, bitset); + + /* Disable the APBB bridge if possible */ + + flags = irqsave(); + + if (getreg32(SAM_PM_PBBMASK) == 0) + { + sam_hsb_disableperipheral(PM_HSBMASK_APBB); + } + + irqrestore(flags); +} diff --git a/nuttx/arch/arm/src/sam34/sam4l_periphclks.h b/nuttx/arch/arm/src/sam34/sam4l_periphclks.h new file mode 100644 index 000000000..895556e5d --- /dev/null +++ b/nuttx/arch/arm/src/sam34/sam4l_periphclks.h @@ -0,0 +1,349 @@ +/************************************************************************************ + * arch/arm/src/sam34/sam4l_periphclks.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H +#define __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* SAM4L helper macros */ + +#define sam_enableperipheral(a,s) sam_modifyperipheral(a,0,s) +#define sam_disableperipheral(a,s) sam_modifyperipheral(a,s,0) + +#define sam_cpu_enableperipheral(s) sam_enableperipheral(SAM_PM_CPUMASK,s) +#define sam_hsb_enableperipheral(s) sam_enableperipheral(SAM_PM_HSBMASK,s) +#define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s) +#define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s) + +#define sam_cpu_disableperipheral(s) sam_disableperipheral(SAM_PM_CPUMASK,s) +#define sam_hsb_disableperipheral(s) sam_disableperipheral(SAM_PM_HSBMASK,s) +#define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s) +#define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s) + +#define sam_pba_enabledivmask(s) sam_pba_modifydivmask(0,s) +#define sam_pba_disabledivmask(s) sam_pba_modifydivmask(s,0) + +/* Macros to enable clocking to individual peripherals */ + +#define sam_aesa_enableclk() sam_hsb_enableperipheral(PM_HSBMASK_AESA) +#define sam_iisc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_IISC) +#define sam_spi_enableclk() sam_pba_enableperipheral(PM_PBAMASK_SPI) + +#define sam_tc0_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_TC0); \ + sam_pba_enabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); \ + } while (0) + +#define sam_tc1_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_TC1); \ + sam_pba_enabledivmask(PM_PBADIVMASK_TIMER_CLOCKS); \ + } while (0) + +#define sam_twim0_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM0) +#define sam_twis0_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIS0) +#define sam_twim1_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM1) +#define sam_twis1_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIS1) + +#define sam_usart0_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_USART0); \ + sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \ + } while (0) + +#define sam_usart1_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_USART1); \ + sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \ + } while (0) + +#define sam_usart2_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_USART2); \ + sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \ + } while (0) + +#define sam_usart3_enableclk() \ + do { \ + sam_pba_enableperipheral(PM_PBAMASK_USART3); \ + sam_pba_enabledivmask(PBA_DIVMASK_CLK_USART); \ + } while (0) + +#define sam_adcife_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ADCIFE) +#define sam_dacc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_DACC) +#define sam_acifc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ACIFC) +#define sam_gloc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_GLOC) +#define sam_abdacb_enableclk() sam_pba_enableperipheral(PM_PBAMASK_ABDACB) +#define sam_trng_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TRNG) +#define sam_parc_enableclk() sam_pba_enableperipheral(PM_PBAMASK_PARC) +#define sam_catb_enableclk() sam_pba_enableperipheral(PM_PBAMASK_CATB) +#define sam_twim2_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM2) +#define sam_twim3_enableclk() sam_pba_enableperipheral(PM_PBAMASK_TWIM3) +#define sam_lcdca_enableclk() sam_pba_enableperipheral(PM_PBAMASK_LCDCA) + +#define sam_flashcalw_enableclk() \ + do { \ + sam_hsb_enableperipheral(PM_HSBMASK_FLASHCALW); \ + sam_pbb_enableperipheral(PM_PBBMASK_FLASHCALW); \ + } while (0) + +#define sam_picocache_enableclk() \ + do { \ + sam_hsb_enableperipheral(PM_HSBMASK_HRAMC1); \ + sam_pbb_enableperipheral(PM_PBBMASK_HRAMC1); \ + } while (0) + +#define sam_hmatrix_enableclk() sam_pbb_enableperipheral(PM_PBBMASK_HMATRIX) + +#define sam_pdca_enableclk() \ + do { \ + sam_hsb_enableperipheral(PM_HSBMASK_PDCA); \ + sam_pbb_enableperipheral(PM_PBBMASK_PDCA); \ + } while (0) + +#define sam_crccu_enableclk() \ + do { \ + sam_hsb_enableperipheral(PM_HSBMASK_CRCCU); \ + sam_pbb_enableperipheral(PM_PBBMASK_CRCCU); \ + } while (0) + +#define sam_usbc_enableclk() \ + do { \ + sam_hsb_enableperipheral(PM_HSBMASK_USBC); \ + sam_pbb_enableperipheral(PM_PBBMASK_USBC); \ + } while (0) + +#define sam_pevc_enableclk() sam_pbb_enableperipheral(PM_PBBMASK_PEVC) +#define sam_pm_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_PM) +#define sam_chipid_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_CHIPID) +#define sam_scif_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_SCIF) +#define sam_freqm_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_FREQM) +#define sam_gpio_enableclk() sam_pbc_enableperipheral(PM_PBCMASK_GPIO) +#define sam_bpm_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_BPM) +#define sam_bscif_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_BSCIF) +#define sam_ast_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_AST) +#define sam_wdt_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_WDT) +#define sam_eic_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_EIC) +#define sam_picouart_enableclk() sam_pbd_enableperipheral(PM_PBDMASK_PICOUART) + +/* Macros to disable clocking to individual peripherals */ + +#define sam_aesa_disableclk() sam_hsb_disableperipheral(PM_HSBMASK_AESA) +#define sam_iisc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_IISC) +#define sam_spi_disableclk() sam_pba_disableperipheral(PM_PBAMASK_SPI) +#define sam_tc0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TC0) +#define sam_tc1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TC1) +#define sam_twim0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM0) +#define sam_twis0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIS0) +#define sam_twim1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM1) +#define sam_twis1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIS1) +#define sam_usart0_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART0) +#define sam_usart1_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART1) +#define sam_usart2_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART2) +#define sam_usart3_disableclk() sam_pba_disableperipheral(PM_PBAMASK_USART3) +#define sam_adcife_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ADCIFE) +#define sam_dacc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_DACC) +#define sam_acifc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ACIFC) +#define sam_gloc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_GLOC) +#define sam_abdacb_disableclk() sam_pba_disableperipheral(PM_PBAMASK_ABDACB) +#define sam_trng_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TRNG) +#define sam_parc_disableclk() sam_pba_disableperipheral(PM_PBAMASK_PARC) +#define sam_catb_disableclk() sam_pba_disableperipheral(PM_PBAMASK_CATB) +#define sam_twim2_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM2) +#define sam_twim3_disableclk() sam_pba_disableperipheral(PM_PBAMASK_TWIM3) +#define sam_lcdca_disableclk() sam_pba_disableperipheral(PM_PBAMASK_LCDCA) +#define sam_flashcalw_disableclk() sam_pba_disableperipheral(PM_HSBMASK_FLASHCALW) + +#define sam_picocache_disableclk() \ + do { \ + sam_hsb_disableperipheral(PM_HSBMASK_HRAMC1); \ + sam_pbb_disableperipheral(PM_PBBMASK_HRAMC1); \ + } while (0) + +#define sam_hmatrix_disableclk() sam_pbb_disableperipheral(PM_PBBMASK_HMATRIX) + +#define sam_pdca_disableclk() \ + do { \ + sam_hsb_disableperipheral(PM_HSBMASK_PDCA); \ + sam_pbb_disableperipheral(PM_PBBMASK_PDCA); \ + } while (0) + +#define sam_crccu_disableclk() \ + do { \ + sam_hsb_disableperipheral(PM_HSBMASK_CRCCU); \ + sam_pbb_disableperipheral(PM_PBBMASK_CRCCU); \ + } while (0) + +#define sam_usbc_disableclk() \ + do { \ + sam_hsb_disableperipheral(PM_HSBMASK_USBC); \ + sam_pbb_disableperipheral(PM_PBBMASK_USBC); \ + } while (0) + +#define sam_pevc_disableclk() sam_pbb_disableperipheral(PM_PBBMASK_PEVC) +#define sam_pm_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_PM) +#define sam_chipid_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_CHIPID) +#define sam_scif_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_SCIF) +#define sam_freqm_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_FREQM) +#define sam_gpio_disableclk() sam_pbc_disableperipheral(PM_PBCMASK_GPIO) +#define sam_bpm_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_BPM) +#define sam_bscif_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_BSCIF) +#define sam_ast_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_AST) +#define sam_wdt_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_WDT) +#define sam_eic_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_EIC) +#define sam_picouart_disableclk() sam_pbd_disableperipheral(PM_PBDMASK_PICOUART) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/**************************************************************************** + * Name: sam_modifyperipheral + * + * Description: + * This is a convenience function that is intended to be used to enable + * or disable module clocking. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits); +#endif + +/**************************************************************************** + * Name: sam_pba_modifydivmask + * + * Description: + * This is a convenience function that is intended to be used to modify + * bits in the PBA divided clock (DIVMASK) register. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_pba_modifydivmask(uint32_t clrbits, uint32_t setbits); +#endif + +/**************************************************************************** + * Name: sam_pba_enableperipheral + * + * Description: + * This is a convenience function to enable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_pba_enableperipheral(uint32_t bitset); +#endif + +/**************************************************************************** + * Name: sam_pba_disableperipheral + * + * Description: + * This is a convenience function to disable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_pba_disableperipheral(uint32_t bitset); +#endif + +/**************************************************************************** + * Name: sam_pbb_enableperipheral + * + * Description: + * This is a convenience function to enable a peripheral on the APBB + * bridge. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_pbb_enableperipheral(uint32_t bitset); +#endif + +/**************************************************************************** + * Name: sam_pbb_disableperipheral + * + * Description: + * This is a convenience function to disable a peripheral on the APBA + * bridge. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_SAM4L +void sam_pbb_disableperipheral(uint32_t bitset); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAM34_SAM4L_PERIPHCLKS_H */ diff --git a/nuttx/arch/arm/src/sam34/sam_clockconfig.h b/nuttx/arch/arm/src/sam34/sam_clockconfig.h index 194e9a9fc..fb3d3f6ee 100644 --- a/nuttx/arch/arm/src/sam34/sam_clockconfig.h +++ b/nuttx/arch/arm/src/sam34/sam_clockconfig.h @@ -46,23 +46,6 @@ * Pre-processor Definitions ************************************************************************************/ -/* SAM4L helper functions */ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -# define sam_enableperipheral(a,s) sam_modifyperipheral(a,0,s) -# define sam_disableperipheral(a,s) sam_modifyperipheral(a,s,0) - -# define sam_cpu_enableperipheral(s) sam_enableperipheral(SAM_PM_CPUMASK,s) -# define sam_hsb_enableperipheral(s) sam_enableperipheral(SAM_PM_HSBMASK,s) -# define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s) -# define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s) - -# define sam_cpu_disableperipheral(s) sam_disableperipheral(SAM_PM_CPUMASK,s) -# define sam_hsb_disableperipheral(s) sam_disableperipheral(SAM_PM_HSBMASK,s) -# define sam_pbc_enableperipheral(s) sam_enableperipheral(SAM_PM_PBCMASK,s) -# define sam_pbd_enableperipheral(s) sam_enableperipheral(SAM_PM_PBDMASK,s) -#endif - /************************************************************************************ * Public Types ************************************************************************************/ @@ -102,71 +85,6 @@ extern "C" void sam_clockconfig(void); -/**************************************************************************** - * Name: sam_modifyperipheral - * - * Description: - * This is a convenience function that is intended to be used to enable - * or disable module clocking. - * - ****************************************************************************/ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -void sam_modifyperipheral(uintptr_t regaddr, uint32_t clrbits, uint32_t setbits); -#endif - -/**************************************************************************** - * Name: sam_pba_enableperipheral - * - * Description: - * This is a convenience function to enable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -void sam_pba_enableperipheral(uint32_t bitset); -#endif - -/**************************************************************************** - * Name: sam_pba_disableperipheral - * - * Description: - * This is a convenience function to disable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -void sam_pba_disableperipheral(uint32_t bitset); -#endif - -/**************************************************************************** - * Name: sam_pbb_enableperipheral - * - * Description: - * This is a convenience function to enable a peripheral on the APBB - * bridge. - * - ****************************************************************************/ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -void sam_pbb_enableperipheral(uint32_t bitset); -#endif - -/**************************************************************************** - * Name: sam_pbb_disableperipheral - * - * Description: - * This is a convenience function to disable a peripheral on the APBA - * bridge. - * - ****************************************************************************/ - -#ifdef CONFIG_ARCH_CHIP_SAM4L -void sam_pbb_disableperipheral(uint32_t bitset); -#endif - #undef EXTERN #if defined(__cplusplus) } |