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authorGregory Nutt <gnutt@nuttx.org>2013-04-06 14:30:15 -0600
committerGregory Nutt <gnutt@nuttx.org>2013-04-06 14:30:15 -0600
commit4251fd2dee3247355441558aa157a8777c63e5e3 (patch)
tree811241cf9b4042c4f3694ab41a2f46b4d83efa88 /nuttx/arch/arm/src
parent734d1cef29e8333e423c6bf5829cd17677f419e0 (diff)
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Fix heap size for the STM32 F427/F437 -- from Mike Smith
Diffstat (limited to 'nuttx/arch/arm/src')
-rwxr-xr-xnuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h10
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_allocateheap.c39
2 files changed, 32 insertions, 17 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h
index ab93d08f9..690313f4d 100755
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h
@@ -320,7 +320,7 @@
#define IOCON_ADMODE_MASK (1 << IOCON_ADMODE_SHIFT)
#define IOCON_FILTER_SHIFT (8) /* Bit 8: Type A */
#define IOCON_FILTER_MASK (1 << IOCON_FILTER_SHIFT)
-#define IOCON_I2CHS_SHIFT (8)/* Bits 8: Type I */
+#define IOCON_I2CHS_SHIFT (8) /* Bit 8: Type I */
#define IOCON_I2CHS_MASK (1 << IOCON_I2CHS_SHIFT)
#define IOCON_SLEW_SHIFT (9) /* Bit 9: Type W */
#define IOCON_SLEW_MASK (1 << IOCON_SLEW_SHIFT)
@@ -333,10 +333,10 @@
/* Pin modes */
-#define IOCON_MODE_FLOAT (0) /* 00: pin has neither pull-up nor pull-down */
-#define IOCON_MODE_PD (1) /* 01: pin has a pull-down resistor enabled */
-#define IOCON_MODE_PU (2) /* 10: pin has a pull-up resistor enabled */
-#define IOCON_MODE_RM (3) /* 11: pin has repeater mode enabled */
+#define IOCON_MODE_FLOAT (0) /* 00: pin has neither pull-up nor pull-down */
+#define IOCON_MODE_PD (1) /* 01: pin has a pull-down resistor enabled */
+#define IOCON_MODE_PU (2) /* 10: pin has a pull-up resistor enabled */
+#define IOCON_MODE_RM (3) /* 11: pin has repeater mode enabled */
/* Pin types */
diff --git a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
index a5fa847d8..eb3964f39 100644
--- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c
@@ -157,6 +157,7 @@
*/
# if CONFIG_MM_REGIONS < 2
+
/* Only one memory region. Force Configuration 1 */
# ifndef CONFIG_STM32_CCMEXCLUDE
@@ -192,24 +193,30 @@
# endif
# endif
-/* All members of the STM32F20xxx and STM32F40xxx families have 128Kb in two
- * banks:
+/* All members of both the STM32F20xxx and STM32F40xxx families have 128Kib
+ * in two banks:
+ *
+ * 1) 112KiB of System SRAM beginning at address 0x2000:0000
+ * 2) 16KiB of System SRAM beginning at address 0x2001:c000
*
- * 1) 112Kb of System SRAM beginning at address 0x2000:0000
- * 2) 16Kb of System SRAM beginning at address 0x2001:c000
+ * Members of the STM32F40xxx family have an additional 64Kib of CCM RAM
+ * for a total of 192KB.
*
- * The STM32F40xxx family has an additional 64Kb of CCM SRAM for a total of
- * 192KB.
+ * 3) 64Kib of CCM SRAM beginning at address 0x1000:0000
*
- * 3) 64Kb of CCM SRAM beginning at address 0x1000:0000
+ * The STM32F427/437 parts have another 64KiB of System SRAM for a total of
+ * 256KiB.
*
- * As determined by ld.script, g_idle_topstack lies in the 112Kb memory
+ * 3) 64Kib of System SRAM beginning at address 0x2002:0000
+ *
+ * As determined by ld.script, g_heapbase lies in the 112KiB memory
* region and that extends to 0x2001:0000. But the first and second memory
* regions are contiguous and treated as one in this logic that extends to
- * 0x2002:0000.
+ * 0x2002:0000 (or 0x2003:0000 for the F427/F437).
*
- * As a complication, CCM SRAM cannot be used for DMA. So, if STM32 DMA is
- * enabled, CCM SRAM should probably be excluded from the heap.
+ * As a complication, CCM SRAM cannot be used for DMA. So, if STM32 DMA is enabled,
+ * CCM SRAM should probably be excluded from the heap or the application must take
+ * extra care to ensure that DMA buffers are not allocated in CCM SRAM.
*
* In addition, external FSMC SRAM may be available.
*/
@@ -225,7 +232,11 @@
/* Set the end of system SRAM */
-# define SRAM1_END 0x20020000
+# if defined(CONFIG_STM32_STM32F427)
+# define SRAM1_END 0x20030000
+# else
+# define SRAM1_END 0x20020000
+# endif
/* Set the range of CCM SRAM as well (although we may not use it) */
@@ -262,6 +273,7 @@
*/
# if CONFIG_MM_REGIONS < 2
+
/* Only one memory region. Force Configuration 1 */
# warning "FSMC SRAM (and CCM SRAM) excluded from the heap"
@@ -293,6 +305,7 @@
# ifdef CONFIG_ARCH_DMA
# warning "CCM SRAM is included in the heap AND DMA is enabled"
# endif
+
# if CONFIG_MM_REGIONS != 3
# error "CONFIG_MM_REGIONS > 3 but I don't know what some of the region(s) are"
# undef CONFIG_MM_REGIONS
@@ -319,6 +332,7 @@
# ifdef CONFIG_ARCH_DMA
# warning "CCM SRAM is included in the heap AND DMA is enabled"
# endif
+
# if CONFIG_MM_REGIONS < 2
# error "CCM SRAM excluded from the heap because CONFIG_MM_REGIONS < 2"
# undef CONFIG_STM32_CCMEXCLUDE
@@ -329,6 +343,7 @@
# define CONFIG_MM_REGIONS 2
# endif
# endif
+
#else
# error "Unsupported STM32 chip"
#endif