Add LPC1788 EMC initialization logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5645 42af7a65-404d-4744-a932-0658087f49c3

7 files changed, 297 insertions, 21 deletions

diff --git a/nuttx/arch/arm/src/lpc17xx/Kconfig b/nuttx/arch/arm/src/lpc17xx/Kconfig
index 22ba6fa04..3d4c8b4e5 100644
--- a/nuttx/arch/arm/src/lpc17xx/Kconfig
+++ b/nuttx/arch/arm/src/lpc17xx/Kconfig
@@ -130,6 +130,11 @@ config LPC17_PLL1
 	bool "PLL1"
 	default y
 
+config LPC17_EMC
+	bool "PLL1"
+	default y
+	depends on ARCH_FAMILY_LPC178X
+
 config LPC17_ETHERNET
 	bool "Ethernet"
 	select NET
diff --git a/nuttx/arch/arm/src/lpc17xx/Make.defs b/nuttx/arch/arm/src/lpc17xx/Make.defs
index 20e016de9..e89a25641 100644
--- a/nuttx/arch/arm/src/lpc17xx/Make.defs
+++ b/nuttx/arch/arm/src/lpc17xx/Make.defs
@@ -91,6 +91,10 @@ ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
 CHIP_ASRCS += lpc17_vectors.S
 endif
 
+ifeq ($(CONFIG_LPC17_EMC),y)
+CHIP_CSRCS += lpc17_emc.c
+endif
+
 ifeq ($(CONFIG_GPIO_IRQ),y)
 CHIP_CSRCS += lpc17_gpioint.c
 endif
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
index 58bd413ea..887aa0a9f 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_pinconfig.h
@@ -483,9 +483,9 @@
 #define GPIO_I2C2_SDA_3    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
 #define GPIO_MAT3p2_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
 
-#define GPIO_EMC_DQM3      (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
-#define GPIO_I2C2_SCL_2    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
-#define GPIO_MAT3p3_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN30)
+#define GPIO_EMC_DQM3      (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
+#define GPIO_I2C2_SCL_2    (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
+#define GPIO_MAT3p3_2      (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN31)
 
 #define GPIO_EMC_D0        (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT3 | GPIO_PIN0)
 #define GPIO_EMC_D1        (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT3 | GPIO_PIN1)
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
index 5aafce7a6..dc272528d 100644
--- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_syscon.h
@@ -349,7 +349,7 @@
 
 #define SYSCON_LCDCFG_CLKDIV_SHIFT       (0) /* Bits 0-4: LCD Panel clock prescaler  */
 #define SYSCON_LCDCFG_CLKDIV_MASK        (0x1f << SYSCON_LCDCFG_CLKDIV_SHIFT)
-#define SYSCON_LCDCFG_CLKDIV(n)          ((n+1) << SYSCON_LCDCFG_CLKDIV_SHIFT) /* n = 0 - 31 */
+#define SYSCON_LCDCFG_CLKDIV(n)          ((n-1) << SYSCON_LCDCFG_CLKDIV_SHIFT) /* n = 1 - 32 */
                                              /* Bits 5-31: Reserved */
 /* Clocking and power control - Peripheral power control registers */
 /* Power Control Register */
@@ -555,19 +555,19 @@
                                                   /* Delay values multiplied by 250 picoseconds */
 #define SYSCON_EMCDLYCTL_CMDDLY_SHIFT     (0)     /* Bits 0-4: Delay value for EMC outputs in command delayed mode */
 #define SYSCON_EMCDLYCTL_CMDDLY_MASK      (0x1f << SYSCON_EMCDLYCTL_CMDDLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CMDDLY(n)       ((n+1) << SYSCON_EMCDLYCTL_CMDDLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CMDDLY(n)       ((n-1) << SYSCON_EMCDLYCTL_CMDDLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 5-7: Reserved */
 #define SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT   (8)     /* Bits 8-12: Delay value for the feedback clock that controls input data sampling */
 #define SYSCON_EMCDLYCTL_FBCLKDLY_MASK    (0x1f << SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT)
-#define SYSCON_EMCDLYCTL_FBCLKDLY(n)      ((n+1)<< SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT) /* n = 2 - 31 */
+#define SYSCON_EMCDLYCTL_FBCLKDLY(n)      ((n-1)<< SYSCON_EMCDLYCTL_FBCLKDLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 13-15: Reserved */
 #define SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT (16)    /* Bits 16-20: Delay value for the CLKOUT0 output */
 #define SYSCON_EMCDLYCTL_CLKOUT0DLY_MASK  (0x1f << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CLKOUT0DLY(n)   ((n+1) << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CLKOUT0DLY(n)   ((n-1) << SYSCON_EMCDLYCTL_CLKOUT0DLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 21-23: Reserved */
 #define SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT (24)    /* Bits 24-28: Delay value for the CLKOUT1 output */
 #define SYSCON_EMCDLYCTL_CLKOUT1DLY_MASK  (0x1f << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT)
-# define SYSCON_EMCDLYCTL_CLKOUT1DLY(n)   ((n+1) << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT) /* n = 2 - 31 */
+# define SYSCON_EMCDLYCTL_CLKOUT1DLY(n)   ((n-1) << SYSCON_EMCDLYCTL_CLKOUT1DLY_SHIFT) /* n = 3 - 32 */
                                                   /* Bits 29-31: Reserved */
 /* Calibration Register - EMC */
 
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c
new file mode 100644
index 000000000..1442fe8b9
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.c
@@ -0,0 +1,192 @@
+/****************************************************************************
+ * arch/arm/src/lpc17/lpc17_emc.c
+ * arch/arm/src/chip/lpc17_emc.c
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <arch/irq.h>
+
+#include "lpc17_syscon.h"
+#include "lpc17_emc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const lpc17_pinset_t g_emcctrl[] =
+{
+  GPIO_EMC_OE,    GPIO_EMC_WE,
+  GPIO_EMC_BLS0,  GPIO_EMC_BLS1,  GPIO_EMC_BLS2,  GPIO_EMC_BLS3,
+  GPIO_EMC_CS0,   GPIO_EMC_CS1,   GPIO_EMC_CS2,   GPIO_EMC_CS3,
+  GPIO_EMC_CAS,   GPIO_EMC_RAS,
+  GPIO_EMC_CLK0,  GPIO_EMC_CLK1,
+  GPIO_EMC_DYCS0, GPIO_EMC_DYCS1, GPIO_EMC_DYCS2, GPIO_EMC_DYCS3,
+  GPIO_EMC_CKE0,  GPIO_EMC_CKE1,  GPIO_EMC_CKE2,  GPIO_EMC_CKE3,
+  GPIO_EMC_DQM0,  GPIO_EMC_DQM1,  GPIO_EMC_DQM2,  GPIO_EMC_DQM3,
+};
+#define EMC_NCTRL (sizeof(g_emcctrl) / sizeof(lpc17_pinset_t))
+
+static const lpc17_pinset_t g_emcdata[] =
+{
+  GPIO_EMC_D0,    GPIO_EMC_D1,    GPIO_EMC_D2,    GPIO_EMC_D3,
+  GPIO_EMC_D4,    GPIO_EMC_D5,    GPIO_EMC_D6,    GPIO_EMC_D7,
+  GPIO_EMC_D8,    GPIO_EMC_D9,    GPIO_EMC_D10,   GPIO_EMC_D11,
+  GPIO_EMC_D12,   GPIO_EMC_D13,   GPIO_EMC_D14,   GPIO_EMC_D15,
+  GPIO_EMC_D16,   GPIO_EMC_D17,   GPIO_EMC_D18,   GPIO_EMC_D19,
+  GPIO_EMC_D20,   GPIO_EMC_D21,   GPIO_EMC_D22,   GPIO_EMC_D23,
+  GPIO_EMC_D24,   GPIO_EMC_D25,   GPIO_EMC_D26,   GPIO_EMC_D27,
+  GPIO_EMC_D28,   GPIO_EMC_D29,   GPIO_EMC_D30,   GPIO_EMC_D31,
+};
+
+/* You can limit the number of data lines configured by defining
+ * BOARD_NDATA in your board.h header file.
+ */
+
+#ifdef BOARD_NDATA
+#  define EMC_NDATA BOARD_NDATA
+#else
+#  define EMC_NDATA (sizeof(g_emcdata) / sizeof(lpc17_pinset_t))
+#endif
+
+static const lpc17_pinset_t g_emcaddr[] =
+{
+  GPIO_EMC_A0,    GPIO_EMC_A1,    GPIO_EMC_A2,    GPIO_EMC_A3,
+  GPIO_EMC_A4,    GPIO_EMC_A5,    GPIO_EMC_A6,    GPIO_EMC_A7,
+  GPIO_EMC_A8,    GPIO_EMC_A9,    GPIO_EMC_A10,   GPIO_EMC_A11,
+  GPIO_EMC_A12,   GPIO_EMC_A13,   GPIO_EMC_A14,   GPIO_EMC_A15,
+  GPIO_EMC_A16,   GPIO_EMC_A17,   GPIO_EMC_A18,   GPIO_EMC_A19,
+  GPIO_EMC_A20,   GPIO_EMC_A21,   GPIO_EMC_A22,   GPIO_EMC_A23,
+  GPIO_EMC_A24,   GPIO_EMC_A25
+};
+
+/* You can limit the number of address lines configured by defining
+ * BOARD_NADDR in your board.h header file.
+ */
+
+#ifdef BOARD_NADDR
+#  define EMC_NADDR BOARD_NADDR
+#else
+#  define EMC_NADDR (sizeof(g_emcaddr) / sizeof(lpc17_pinset_t))
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc17_emcinitialize
+ *
+ * Description:
+ *   Initialize EMC clocking and pin configuration.  This function should be
+ *   called once when the system first boots in order to make the EMC
+ *   operational.
+ *
+ ****************************************************************************/
+
+void lpc17_emcinitialize(void)
+{
+  uint32_t regval;
+  int i;
+
+  /* Enable clocking for the EMC */
+
+  regval = getreg32(LPC17_SYSCON_PCONP);
+  regval |= SYSCON_PCONP_PCEMC;
+  putreg32(regval, LPC17_SYSCON_PCONP);
+
+  /* Set EMC delay values:
+   *
+   * CMDDLY: Programmable delay value for EMC outputs in command delayed
+   *   mode.  The delay amount is roughly CMDDLY * 250 picoseconds.
+   * FBCLKDLY: Programmable delay value for the feedback clock that controls
+   *   input data sampling.  The delay amount is roughly (FBCLKDLY+1) * 250
+   *   picoseconds.
+   * CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
+   *   typically be used in clock delayed mode.  The delay amount is roughly
+   *  (CLKOUT0DLY+1) * 250 picoseconds.
+   * CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
+   *  typically be used in clock delayed mode.  The delay amount is roughly
+   *  (CLKOUT1DLY+1) * 250 picoseconds.
+   */
+
+  regval = SYSCON_EMCDLYCTL_CMDDLY(BOARD_CMDDLY) |
+           SYSCON_EMCDLYCTL_FBCLKDLY(BOARD_FBCLKDLY) |
+           SYSCON_EMCDLYCTL_CLKOUT0DLY(BOARD_CLKOUT0DLY) |
+           SYSCON_EMCDLYCTL_CLKOUT1DLY(BOARD_CLKOUT1DLY);
+  putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
+
+  /* Enable the EMC */
+
+  putreg32(EMC_CONTROL_E, LPC17_EMC_CONTROL);
+  putreg32(0, LPC17_EMC_CONFIG);
+
+  /* Configure EMC pins */
+  /* Control signals */
+
+  for (i = 0; i < EMC_NCTRL; i++)
+    {
+      lpc17_configgpio(g_emcctrl[i]);
+    }
+
+  /* Data lines */
+
+  for (i = 0; i < EMC_NDATA; i++)
+    {
+      lpc17_configgpio(g_emcdata[i]);
+    }
+
+  /* Address lines */
+
+  for (i = 0; i < EMC_NADDR; i++)
+    {
+      lpc17_configgpio(g_emcaddr[i]);
+    }
+}
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h
new file mode 100644
index 000000000..ba6c6040b
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_emc.h
@@ -0,0 +1,74 @@
+/****************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_emc.h
+ *
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H
+#define __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include "chip/lpc17_emc.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: lpc17_emcinitialize
+ *
+ * Description:
+ *   Initialize EMC clocking and pin configuration.  This function should be
+ *   called once when the system first boots in order to make the EMC
+ *   operational.
+ *
+ ****************************************************************************/
+
+void lpc17_emcinitialize(void);
+
+#endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_EMC_H */
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h b/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
index 9fc6445b6..f6cbe0677 100644
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_i2s.h
@@ -1,5 +1,5 @@
-/************************************************************************************
- * arch/arm/src/lpc17xx/lpc17_i2s
+/****************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_i2s.h
  *
  *   Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -31,31 +31,32 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************************************/
+ ****************************************************************************/
 
 #ifndef __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H
 #define __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H
 
-/************************************************************************************
+/****************************************************************************
  * Included Files
- ************************************************************************************/
+ ****************************************************************************/
 
 #include <nuttx/config.h>
+#include "chip/lpc17_i2s.h"
 
-/************************************************************************************
+/****************************************************************************
  * Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Types
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Data
- ************************************************************************************/
+ ****************************************************************************/
 
-/************************************************************************************
+/****************************************************************************
  * Public Functions
- ************************************************************************************/
+ ****************************************************************************/
 
 #endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_I2S_H */