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authorGregory Nutt <gnutt@nuttx.org>2013-04-22 09:10:58 -0600
committerGregory Nutt <gnutt@nuttx.org>2013-04-22 09:10:58 -0600
commite044e9c90a7eab7406a31831b3c661a80eb05b17 (patch)
treefff4add300ed8ffe4b704012c92f22a30e385b33 /nuttx/arch/arm
parent11278c31a01b6fdfb09e2a3109a20d38ef793055 (diff)
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New Kconfig convention: Extra indentation in comments will render as HTML preformatted text
Diffstat (limited to 'nuttx/arch/arm')
-rw-r--r--nuttx/arch/arm/Kconfig2
-rw-r--r--nuttx/arch/arm/src/lpc17xx/Kconfig2
2 files changed, 2 insertions, 2 deletions
diff --git a/nuttx/arch/arm/Kconfig b/nuttx/arch/arm/Kconfig
index c9b655d3a..a512edf25 100644
--- a/nuttx/arch/arm/Kconfig
+++ b/nuttx/arch/arm/Kconfig
@@ -188,7 +188,7 @@ config ARMV7M_USEBASEPRI
depends on ARCH_CORTEXM3 || ARCH_CORTEXM4
---help---
Use the BASEPRI register to enable and disable able interrupts. By
- default, the PRIMASK register is used for this purpose. This
+ default, the PRIMASK register is used for this purpose. This
usually results in hardfaults that are properly handling by the
RTOS. Using the BASEPRI register will avoid these hardfault.
That is needed primarily for integration with some toolchains.
diff --git a/nuttx/arch/arm/src/lpc17xx/Kconfig b/nuttx/arch/arm/src/lpc17xx/Kconfig
index e4a3913b1..6f8967054 100644
--- a/nuttx/arch/arm/src/lpc17xx/Kconfig
+++ b/nuttx/arch/arm/src/lpc17xx/Kconfig
@@ -540,7 +540,7 @@ config SDIO_WIDTH_D1_ONLY
---help---
Select 1-bit transfer mode. This may be selected to force the driver
operate with only a single data line (the default is to use all
- 4 SD data lines).Default: 4-bit transfer mode.
+ 4 SD data lines).Default: 4-bit transfer mode.
endmenu