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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-06-11 14:53:56 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-06-11 14:53:56 +0000
commitc0cf3ce4b3306a6ea08d579f84247900b7e9611e (patch)
treef957ffd23905edecc82b8403ddcc3a076a134fe6 /nuttx/arch/avr/src/at90usb
parent6824157a582c0ba02a97f460be9fd3bd94c1e485 (diff)
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Add ATMega128 configuration
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3695 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/avr/src/at90usb')
-rw-r--r--nuttx/arch/avr/src/at90usb/at90usb_lowconsole.c28
1 files changed, 22 insertions, 6 deletions
diff --git a/nuttx/arch/avr/src/at90usb/at90usb_lowconsole.c b/nuttx/arch/avr/src/at90usb/at90usb_lowconsole.c
index 648f193df..eb93dc5e2 100644
--- a/nuttx/arch/avr/src/at90usb/at90usb_lowconsole.c
+++ b/nuttx/arch/avr/src/at90usb/at90usb_lowconsole.c
@@ -144,13 +144,19 @@
#ifdef HAVE_USART_DEVICE
void usart1_reset(void)
{
+ /* Clear USART configuration */
+
UCSR1A = 0;
UCSR1B = 0;
UCSR1C = 0;
- DDRD &= ~(1 << 3);
+ /* Unconfigure pins */
+
+ DDRD &= ~(1 << 3);
PORTD &= ~(1 << 2);
-
+
+ /* Unconfigure BAUD divisor */
+
UBRR1 = 0;
}
#endif
@@ -214,10 +220,20 @@ void usart1_configure(void)
UCSR1B = ucsr1b;
UCSR1C = ucsr1c;
- /* Configure pin */
-
- DDRD |= (1 << 3);
- PORTD |= (1 << 2);
+ /* Pin Configuration: None necessary, Port D bits 2&3 are automatically
+ * configured:
+ *
+ * Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When
+ * the USART1 receiver is enabled this pin is configured as an input
+ * regardless of the value of DDD2. When the USART forces this pin to
+ * be an input, the pull-up can still be controlled by the PORTD2 bit.
+ * Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1).
+ * When the USART1 Transmitter is enabled, this pin is configured as
+ * an output regardless of the value of DDD3.
+ */
+
+ DDRD |= (1 << 3); /* Force Port D pin 3 to be an output */
+ PORTD |= (1 << 2); /* Set pull-up on port D pin 2 */
/* Set the baud rate divisor */