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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-10-30 00:40:53 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-10-30 00:40:53 +0000 |
commit | fc44796aa0ce534591ab5f19fad282f34ff1ab44 (patch) | |
tree | 9cdab5d8ef446adb1d3034888d31112208c0dafa /nuttx/arch/avr/src/at91uc3/at91uc3_intc.h | |
parent | 39f492cc53cc5d6b2e744ee68d9f6bd724f933c2 (diff) | |
download | px4-nuttx-fc44796aa0ce534591ab5f19fad282f34ff1ab44.tar.gz px4-nuttx-fc44796aa0ce534591ab5f19fad282f34ff1ab44.tar.bz2 px4-nuttx-fc44796aa0ce534591ab5f19fad282f34ff1ab44.zip |
Fix big-time naming error -- what was I thinking?
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3058 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/avr/src/at91uc3/at91uc3_intc.h')
-rwxr-xr-x | nuttx/arch/avr/src/at91uc3/at91uc3_intc.h | 98 |
1 files changed, 0 insertions, 98 deletions
diff --git a/nuttx/arch/avr/src/at91uc3/at91uc3_intc.h b/nuttx/arch/avr/src/at91uc3/at91uc3_intc.h deleted file mode 100755 index 9991f5e53..000000000 --- a/nuttx/arch/avr/src/at91uc3/at91uc3_intc.h +++ /dev/null @@ -1,98 +0,0 @@ -/************************************************************************************ - * arch/avr/src/at91uc3/at91uc3_intc.h - * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_AVR_SRC_AT91UC3_AT91UC3_INTC_H -#define __ARCH_AVR_SRC_AT91UC3_AT91UC3_INTC_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include <nuttx/config.h> - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Register offsets *****************************************************************/ - -#define AVR32_INTC_IPR_OFFSET(n) ((n) << 2) /* Interrupt priority registers */ -#define AVR32_INTC_IRR_OFFSET(n) (0x100 + ((n) << 2)) /* Interrupt request registers */ -#define AVR32_INTC_ICR_OFFSET(n) (0x20c - ((n) << 2)) /* Interrupt cause registers */ - -/* Register Addresses ***************************************************************/ - -#define AVR32_INTC_IPR(n) (AVR32_INTC_BASE+AVR32_INTC_IPR_OFFSET(n)) -#define AVR32_INTC_IRR(n) (AVR32_INTC_BASE+AVR32_INTC_IRR_OFFSET(n)) -#define AVR32_INTC_ICR(n) (AVR32_INTC_BASE+AVR32_INTC_ICR_OFFSET(n)) - -/* Register Bit-field Definitions ***************************************************/ - -/* Interrupt priority register bit-field definitions */ - -#define INTC_IPR_AUTOVECTOR_SHIFT (0) /* Bits 0-13: Autovector address */ -#define INTC_IPR_AUTOVECTOR_MASK (0x3fff << INTC_IPR_AUTOVECTOR_SHIFT) -#define INTC_IPR_INTLEVEL_SHIFT (30) /* Bits 30-31: Interrupt Level */ -#define INTC_IPR_INTLEVEL_MASK (3 << INTC_IPR_INTLEVEL_SHIFT) -# define INTC_IPR_INTLEVEL_INT0 (0 << INTC_IPR_INTLEVEL_SHIFT) /* Lowest priority */ -# define INTC_IPR_INTLEVEL_INT1 (1 << INTC_IPR_INTLEVEL_SHIFT) -# define INTC_IPR_INTLEVEL_INT2 (2 << INTC_IPR_INTLEVEL_SHIFT) -# define INTC_IPR_INTLEVEL_INT3 (3 << INTC_IPR_INTLEVEL_SHIFT) /* Highest priority */ - -/* Interrupt request register bit-field definitions */ - -#define INTC_IRR_REG(n) (AVR32_INTC_IPR((n) >> 5)) -#define INTC_IRR_SHIFT(n) (1 << ((n) & 0x1f)) -#define INTC_IRR_MASK(n) (1 << NTC_IRR_SHIFT(n)) - -/* Interrupt cause register bit-field definitions */ - -#define INTC_ICR_CAUSE_SHIFT (0) /* Bits 0-5: Interrupt Group Causing Interrupt of Priority n */ -#define INTC_ICR_CAUSE_MASK (0x3f << INTC_ICR_CAUSE_SHIFT) - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_AVR_SRC_AT91UC3_AT91UC3_INTC_H */ - |