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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-06-07 23:37:59 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-06-07 23:37:59 +0000
commitb2c3a559c7701728526026fcd64e85d9004715f2 (patch)
tree51f4003edb61b2835083c86bf987ebaf9b46efa1 /nuttx/arch/avr
parent34f8aab8f0e19cc5bd0dae6bf7db3eb1d164836c (diff)
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First AVR compile
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3681 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/avr')
-rwxr-xr-xnuttx/arch/avr/src/at90usb/at90usb_head.S32
-rwxr-xr-xnuttx/arch/avr/src/atmega/atmega_head.S29
2 files changed, 60 insertions, 1 deletions
diff --git a/nuttx/arch/avr/src/at90usb/at90usb_head.S b/nuttx/arch/avr/src/at90usb/at90usb_head.S
index 8c9c18bd2..7a1d71e9f 100755
--- a/nuttx/arch/avr/src/at90usb/at90usb_head.S
+++ b/nuttx/arch/avr/src/at90usb/at90usb_head.S
@@ -46,7 +46,20 @@
* Pre-processor definitions
****************************************************************************/
-#define STACKBASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
+/* Stack is allocated just after .bss and before the heap */
+
+#define STACKBASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE-1)
+
+/* The RAMPZ register is only available for CPUs with more than 64Kb of FLASH.
+ * Only the AT90USB646, 647, 1286, and 1287 are supported by this file.
+ *
+ * - Support for the EPLMX instructions is assumed if RAMPZ is present
+ * - If RAMPZ is not present, support for LPMX is assumed
+ */
+
+#if defined(CONFIG_ARCH_CHIP_AT90USB1286) || defined(CONFIG_ARCH_CHIP_AT90USB1286)
+# define HAVE_RAMPZ 1
+#endif
/****************************************************************************
* External Symbols
@@ -180,6 +193,7 @@ __start:
/* Copy initial global data values from FLASH into RAM */
+#ifdef HAVE_RAMPZ
ldi r17, hi8(_edata)
ldi r26, lo8(_sdata)
ldi r27, hi8(_sdata)
@@ -197,6 +211,22 @@ __start:
cpi r26, lo8(_edata)
cpc r27, r17
brne .Lcopyloop
+#else
+ ldi r17, hi8(_edata)
+ ldi r26, lo8(_sdata)
+ ldi r27, hi8(_sdata)
+ ldi r30, lo8(_eronly)
+ ldi r31, hi8(_eronly)
+ rjmp .Lcopystart
+
+.Lcopyloop:
+ lpm r0, Z+
+ st X+, r0
+.Lcopystart:
+ cpi r26, lo8(_edata)
+ cpc r27, r17
+ brne .Lcopyloop
+#endif
/* Clear uninitialized data */
diff --git a/nuttx/arch/avr/src/atmega/atmega_head.S b/nuttx/arch/avr/src/atmega/atmega_head.S
index cf834bc70..cd3c194dc 100755
--- a/nuttx/arch/avr/src/atmega/atmega_head.S
+++ b/nuttx/arch/avr/src/atmega/atmega_head.S
@@ -46,8 +46,20 @@
* Pre-processor definitions
****************************************************************************/
+/* Stack is allocated just after .bss and before the heap */
+
#define STACKBASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
+/* The RAMPZ register is only available for CPUs with more than 64Kb of FLASH.
+ * At present, only the ATMega128 is supported so RAMPZ should always be
+ * available.
+ *
+ * - Support for the EPLMX instructions is assumed if RAMPZ is present
+ * - If RAMPZ is not present, support for LPMX is assumed
+ */
+
+#define HAVE_RAMPZ 1
+
/****************************************************************************
* External Symbols
****************************************************************************/
@@ -174,6 +186,7 @@ __start:
/* Copy initial global data values from FLASH into RAM */
+#ifdef HAVE_RAMPZ
ldi r17, hi8(_edata)
ldi r26, lo8(_sdata)
ldi r27, hi8(_sdata)
@@ -191,6 +204,22 @@ __start:
cpi r26, lo8(_edata)
cpc r27, r17
brne .Lcopyloop
+#else
+ ldi r17, hi8(_edata)
+ ldi r26, lo8(_sdata)
+ ldi r27, hi8(_sdata)
+ ldi r30, lo8(_eronly)
+ ldi r31, hi8(_eronly)
+ rjmp .Lcopystart
+
+.Lcopyloop:
+ lpm r0, Z+
+ st X+, r0
+.Lcopystart:
+ cpi r26, lo8(_edata)
+ cpc r27, r17
+ brne .Lcopyloop
+#endif
/* Clear uninitialized data */