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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-10-10 16:52:14 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-10-10 16:52:14 +0000
commitff641f36093e5a01fed6f896ba0b6a1f7969144f (patch)
tree57dd0602747751bf88baaf02c9454fdd98c7d1fe /nuttx/arch/mips/include/pic32mx/chip.h
parent6d7921dc5577dddfd1872c68d9236a6d7b61e12a (diff)
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Adding support of PIC32MX5xx/6xx/7xx families
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4034 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/mips/include/pic32mx/chip.h')
-rw-r--r--nuttx/arch/mips/include/pic32mx/chip.h1386
1 files changed, 1386 insertions, 0 deletions
diff --git a/nuttx/arch/mips/include/pic32mx/chip.h b/nuttx/arch/mips/include/pic32mx/chip.h
new file mode 100644
index 000000000..07ba3c69a
--- /dev/null
+++ b/nuttx/arch/mips/include/pic32mx/chip.h
@@ -0,0 +1,1386 @@
+/****************************************************************************
+ * arch/mips/include/pic32mx/chip.h
+ *
+ * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_MIPS_INCLUDE_PIC32MX_CHIP_H
+#define __ARCH_MIPS_INCLUDE_PIC32MX_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+/* Configuration ************************************************************/
+
+#if defined(CONFIG_ARCH_CHIP_PIC32MX320F032H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 40 /* 40MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 32 /* 32Kb program FLASH */
+# define CHIP_DATAMEM_KB 8 /* 8Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 0 /* No programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX320F064H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 16 /* 16Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 0 /* No programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX320F128H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 16 /* 16Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 0 /* No programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX340F128H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX340F256H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX340F512H)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX320F128L)
+# define CHIP_PIC32MX3 1
+# undef CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 16 /* 16Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 0 /* No programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX340F128L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX360F256L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX360F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 0
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX420F032H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 40 /* 40MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 32 /* 32Kb program FLASH */
+# define CHIP_DATAMEM_KB 8 /* 8Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 0 /* No programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 1 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX440F128H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 40 /* 40MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 1 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX440F256H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 1 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX440F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT, MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 1 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX440F128L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX460F256L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX460F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4 1
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT=100 BG=121 */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels */
+# define CHIP_NUSBDMACHAN 2
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 2 /* 2 UARTS */
+# define CHIP_UARTFIFOD 4
+# define CHIP_NSPI 2 /* 2 SPI interfaces */
+# define CHIP_NI2C 2 /* 2 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX534F064H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 16 /* 16Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX564F064H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX564F128H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX575F256H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX575F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX534F064L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 16 /* 16Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX564F064L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX564F128L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX575F256L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX575F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5 1
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */ /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 0 /* No Ethernet */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX664F064H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */ /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX664F128H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX675F256H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX675F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX695F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 128 /* 128Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX664F064L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 64 /* 64Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX664F128L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX675F256L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX675F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX695F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6 1
+# undef CHIP_PIC32MX7
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 128 /* 128Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* xx programmable DMA channels (4 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 0 /* No CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX764F128H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (6 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernett interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX775F256H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX775F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX795F512H)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 64 /* Package PT,MR */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 128 /* 128Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# undef CHIP_TRACE /* No trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 3 /* 3 SPI interfaces */
+# define CHIP_NI2C 4 /* 4 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX764F128L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 128 /* 128Kb program FLASH */
+# define CHIP_DATAMEM_KB 32 /* 32Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 4 /* 4 programmable DMA channels (6 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 1 /* 1 CAN interface */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX775F256L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 256 /* 256Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX775F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 64 /* 64Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# undef CHIP_CVR /* No comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#elif defined(CONFIG_ARCH_CHIP_PIC32MX795F512L)
+# undef CHIP_PIC32MX3
+# define CHIP_PIC32MX4
+# undef CHIP_PIC32MX5
+# undef CHIP_PIC32MX6
+# undef CHIP_PIC32MX7 1
+# define CHIP_NPINS 100 /* Package PT,PF,BG */
+# define CHIP_MHZ 80 /* 80MHz maximum frequency */
+# define CHIP_BOOTFLASH_KB 12 /* 12Kb boot FLASH */
+# define CHIP_PROGFLASH_KB 512 /* 512Kb program FLASH */
+# define CHIP_DATAMEM_KB 128 /* 128Kb data memory */
+# define CHIP_NTIMERS 5 /* 5 timers */
+# define CHIP_NIC 5 /* 5 input capture */
+# define CHIP_NOC 5 /* 5 output compare */
+# define CHIP_NDMACH 8 /* 8 programmable DMA channels (8 dedicated) */
+# define CHIP_NUSBDMACHAN tbd
+# define CHIP_CVR 1 /* Have comparator voltage reference */
+# define CHIP_TRACE 1 /* Have trace capability */
+# define CHIP_NUARTS 6 /* 6 UARTS */
+# define CHIP_UARTFIFOD tbd
+# define CHIP_NSPI 4 /* 4 SPI interfaces */
+# define CHIP_NI2C 5 /* 5 I2C interfaces */
+# define CHIP_NCAN 2 /* 2 CAN interfaces */
+# define CHIP_NADC10 16 /* 16 10-bit ADC channels */
+# define CHIP_NCM 2 /* 2 Comparators */
+# define CHIP_PMP 1 /* Have parallel master port */
+# define CHIP_PSP 1 /* Have parallel slave port */
+# define CHIP_NETHERNET 1 /* 1 Ethernet interface */
+# define CHIP_JTAG
+#else
+# error "Unrecognized PIC32 device
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_MIPS_INCLUDE_PIC32MX_CHIP_H */