diff options
| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-13 23:14:32 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-13 23:14:32 +0000 |
| commit | 6f8fd8927787deda605f6fb070bab21ee4022084 (patch) | |
| tree | f9a5029f021895bfb2fe8a875e51bde5323942eb /nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h | |
| parent | 05a6d30dc59a942e36c01537bbd29b466c0186cd (diff) | |
| download | px4-nuttx-6f8fd8927787deda605f6fb070bab21ee4022084.tar.gz px4-nuttx-6f8fd8927787deda605f6fb070bab21ee4022084.tar.bz2 px4-nuttx-6f8fd8927787deda605f6fb070bab21ee4022084.zip | |
Add FLASH header file
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3605 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h')
| -rwxr-xr-x | nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h | 190 |
1 files changed, 99 insertions, 91 deletions
diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h b/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h index e3e5eb07e..2251bc1aa 100755 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h @@ -1,4 +1,4 @@ -/****************************************************************************
+/************************************************************************************
* arch/mips/src/pic32mx/pic32mx-memorymap.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
@@ -30,184 +30,192 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
+ ****
+ // *********************************************************************************/
#ifndef __ARCH_MIPS_SRC_PIC32MX_PIC32MX_MEMORYMAP_H
#define __ARCH_MIPS_SRC_PIC32MX_PIC32MX_MEMORYMAP_H
-/****************************************************************************
+/************************************************************************************
* Included Files
- ****************************************************************************/
+ ************************************************************************************/
#include <nuttx/config.h>
-#include "mips32-memorymap.h"
+#include "chip.h"
-/****************************************************************************
+/************************************************************************************
* Pre-Processor Definitions
- ****************************************************************************/
-/* Physical Memory Map ******************************************************/
+ ************************************************************************************/
+/* This memory may be valid for other chips as well, but I don't know that */
+
+#if defined(CHIP_PIC32MX3) || defined(CHIP_PIC32MX3)
-#define PIC32MX_DATAMEM_PBASE 0x00000000 /* Size depends on CHIP_DATAMEM_KB */
-#define PIC32MX_PROGFLASH_PBASE 0x1d000000 /* Size depends on CHIP_PROGFLASH_KB */
-#define PIC32MX_SFR_PBASE 0x1f800000 /* Special function registers */
-#define PIC32MX_BOOTFLASH_PBASE 0x1fc00000 /* Size depends on CHIP_BOOTFLASH_KB */
-#define PIC32MX_DEVCFG_PBASE 0x1fc02ff0 /* Device configuration registers */
+/* Physical Memory Map **************************************************************/
-/* Virtual Memory Map *******************************************************/
+# define PIC32MX_DATAMEM_PBASE 0x00000000 /* Size depends on CHIP_DATAMEM_KB */
+# define PIC32MX_PROGFLASH_PBASE 0x1d000000 /* Size depends on CHIP_PROGFLASH_KB */
+# define PIC32MX_SFR_PBASE 0x1f800000 /* Special function registers */
+# define PIC32MX_BOOTFLASH_PBASE 0x1fc00000 /* Size depends on CHIP_BOOTFLASH_KB */
+# define PIC32MX_DEVCFG_PBASE 0x1fc02ff0 /* Device configuration registers */
-#define PIC32MX_DATAMEM_K0BASE (KSEG0_BASE + PIC32MX_DATAMEM_PBASE)
-#define PIC32MX_PROGFLASH_K0BASE (KSEG0_BASE + PIC32MX_PROGFLASH_PBASE)
-#define PIC32MX_BOOTFLASH_K0BASE (KSEG0_BASE + PIC32MX_BOOTFLASH_PBASE)
-#define PIC32MX_DEVCFG_K0BASE (KSEG0_BASE + PIC32MX_DEVCFG_PBASE)
+/* Virtual Memory Map ***************************************************************/
-#define PIC32MX_DATAMEM_K1BASE (KSEG1_BASE + PIC32MX_DATAMEM_PBASE)
-#define PIC32MX_PROGFLASH_K1BASE (KSEG1_BASE + PIC32MX_PROGFLASH_PBASE)
-#define PIC32MX_SFR_K1BASE (KSEG1_BASE + PIC32MX_SFR_PBASE)
-#define PIC32MX_BOOTFLASH_K1BASE (KSEG1_BASE + PIC32MX_BOOTFLASH_PBASE)
-#define PIC32MX_DEVCFG_K1BASE (KSEG1_BASE + PIC32MX_DEVCFG_PBASE)
+# define PIC32MX_DATAMEM_K0BASE (KSEG0_BASE + PIC32MX_DATAMEM_PBASE)
+# define PIC32MX_PROGFLASH_K0BASE (KSEG0_BASE + PIC32MX_PROGFLASH_PBASE)
+# define PIC32MX_BOOTFLASH_K0BASE (KSEG0_BASE + PIC32MX_BOOTFLASH_PBASE)
+# define PIC32MX_DEVCFG_K0BASE (KSEG0_BASE + PIC32MX_DEVCFG_PBASE)
-/* Register Base Addresses **************************************************/
+# define PIC32MX_DATAMEM_K1BASE (KSEG1_BASE + PIC32MX_DATAMEM_PBASE)
+# define PIC32MX_PROGFLASH_K1BASE (KSEG1_BASE + PIC32MX_PROGFLASH_PBASE)
+# define PIC32MX_SFR_K1BASE (KSEG1_BASE + PIC32MX_SFR_PBASE)
+# define PIC32MX_BOOTFLASH_K1BASE (KSEG1_BASE + PIC32MX_BOOTFLASH_PBASE)
+# define PIC32MX_DEVCFG_K1BASE (KSEG1_BASE + PIC32MX_DEVCFG_PBASE)
+
+/* Register Base Addresses **********************************************************/
/* Watchdog Register Base Address */
-#define PIC32MX_WDT_K1BASE (PIC32MX_SFR_K1BASE + 0x00000000)
+# define PIC32MX_WDT_K1BASE (PIC32MX_SFR_K1BASE + 0x00000000)
/* RTCC Register Base Address */
-#define PIC32MX_RTCC_K1BASE (PIC32MX_SFR_K1BASE + 0x00000200)
+# define PIC32MX_RTCC_K1BASE (PIC32MX_SFR_K1BASE + 0x00000200)
/* Timer 1-5 Register Base Addresses */
-#define PIC32MX_TIMER1_K1BASE (PIC32MX_SFR_K1BASE + 0x00000600)
-#define PIC32MX_TIMER2_K1BASE (PIC32MX_SFR_K1BASE + 0x00000800)
-#define PIC32MX_TIMER3_K1BASE (PIC32MX_SFR_K1BASE + 0x00000a00)
-#define PIC32MX_TIMER4_K1BASE (PIC32MX_SFR_K1BASE + 0x00000c00)
-#define PIC32MX_TIMER5_K1BASE (PIC32MX_SFR_K1BASE + 0x00000e00)
+# define PIC32MX_TIMER1_K1BASE (PIC32MX_SFR_K1BASE + 0x00000600)
+# define PIC32MX_TIMER2_K1BASE (PIC32MX_SFR_K1BASE + 0x00000800)
+# define PIC32MX_TIMER3_K1BASE (PIC32MX_SFR_K1BASE + 0x00000a00)
+# define PIC32MX_TIMER4_K1BASE (PIC32MX_SFR_K1BASE + 0x00000c00)
+# define PIC32MX_TIMER5_K1BASE (PIC32MX_SFR_K1BASE + 0x00000e00)
/* Input Capture 1-5 Register Base Addresses */
-#define PIC32MX_INCAP1_K1BASE (PIC32MX_SFR_K1BASE + 0x00002000)
-#define PIC32MX_INCAP2_K1BASE (PIC32MX_SFR_K1BASE + 0x00002200)
-#define PIC32MX_INCAP3_K1BASE (PIC32MX_SFR_K1BASE + 0x00002400)
-#define PIC32MX_INCAP4_K1BASE (PIC32MX_SFR_K1BASE + 0x00002600)
-#define PIC32MX_INCAP5_K1BASE (PIC32MX_SFR_K1BASE + 0x00002800)
+# define PIC32MX_INCAP1_K1BASE (PIC32MX_SFR_K1BASE + 0x00002000)
+# define PIC32MX_INCAP2_K1BASE (PIC32MX_SFR_K1BASE + 0x00002200)
+# define PIC32MX_INCAP3_K1BASE (PIC32MX_SFR_K1BASE + 0x00002400)
+# define PIC32MX_INCAP4_K1BASE (PIC32MX_SFR_K1BASE + 0x00002600)
+# define PIC32MX_INCAP5_K1BASE (PIC32MX_SFR_K1BASE + 0x00002800)
/* Output Compare 1-5 Register Base Addresses */
-#define PIC32MX_OUTCMP1_K1BASE (PIC32MX_SFR_K1BASE + 0x00003000)
-#define PIC32MX_OUTCMP2_K1BASE (PIC32MX_SFR_K1BASE + 0x00003200)
-#define PIC32MX_OUTCMP3_K1BASE (PIC32MX_SFR_K1BASE + 0x00003400)
-#define PIC32MX_OUTCMP4_K1BASE (PIC32MX_SFR_K1BASE + 0x00003600)
-#define PIC32MX_OUTCMP5_K1BASE (PIC32MX_SFR_K1BASE + 0x00003800)
+# define PIC32MX_OUTCMP1_K1BASE (PIC32MX_SFR_K1BASE + 0x00003000)
+# define PIC32MX_OUTCMP2_K1BASE (PIC32MX_SFR_K1BASE + 0x00003200)
+# define PIC32MX_OUTCMP3_K1BASE (PIC32MX_SFR_K1BASE + 0x00003400)
+# define PIC32MX_OUTCMP4_K1BASE (PIC32MX_SFR_K1BASE + 0x00003600)
+# define PIC32MX_OUTCMP5_K1BASE (PIC32MX_SFR_K1BASE + 0x00003800)
/* I2C 1-2 Register Base Addresses */
-#define PIC32MX_I2C1_K1BASE (PIC32MX_SFR_K1BASE + 0x00005000)
-#define PIC32MX_I2C2_K1BASE (PIC32MX_SFR_K1BASE + 0x00005200)
+# define PIC32MX_I2C1_K1BASE (PIC32MX_SFR_K1BASE + 0x00005000)
+# define PIC32MX_I2C2_K1BASE (PIC32MX_SFR_K1BASE + 0x00005200)
/* SPI 1-2 Register Base Addresses */
-#define PIC32MX_SPI1_K1BASE (PIC32MX_SFR_K1BASE + 0x00005800)
-#define PIC32MX_SPI2_K1BASE (PIC32MX_SFR_K1BASE + 0x00005a00)
+# define PIC32MX_SPI1_K1BASE (PIC32MX_SFR_K1BASE + 0x00005800)
+# define PIC32MX_SPI2_K1BASE (PIC32MX_SFR_K1BASE + 0x00005a00)
/* UART 1-2 Register Base Addresses */
-#define PIC32MX_UART1_K1BASE (PIC32MX_SFR_K1BASE + 0x00006000)
-#define PIC32MX_UART2_K1BASE (PIC32MX_SFR_K1BASE + 0x00006200)
+# define PIC32MX_UART1_K1BASE (PIC32MX_SFR_K1BASE + 0x00006000)
+# define PIC32MX_UART2_K1BASE (PIC32MX_SFR_K1BASE + 0x00006200)
/* Parallel Master Register Base Address */
-#define PCI32MX_PMSTR_K1BASE (PIC32MX_SFR_K1BASE + 0x00007000)
+# define PCI32MX_PMSTR_K1BASE (PIC32MX_SFR_K1BASE + 0x00007000)
/* ADC Register Base Addresses */
-#define PIC32MX_ADC_K1BASE (PIC32MX_SFR_K1BASE + 0x00009000)
+# define PIC32MX_ADC_K1BASE (PIC32MX_SFR_K1BASE + 0x00009000)
/* Comparator Voltage Reference Register Base Addresses */
-#define PIC32MX_VREF_K1BASE (PIC32MX_SFR_K1BASE + 0x00009800)
+# define PIC32MX_VREF_K1BASE (PIC32MX_SFR_K1BASE + 0x00009800)
/* Comparator Register Base Addresses */
-#define PIC32MX_COMP_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000)
+# define PIC32MX_COMP_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000)
/* Oscillator Control Register Base Addresses */
-#define PIC32MX_OSC_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f000)
+# define PIC32MX_OSC_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f000)
/* Programming and Diagnostics Register Base Addresses */
-#define PIC32MX_SYSCON_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f200)
+# define PIC32MX_SYSCON_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f200)
/* FLASH Controller Register Base Addresses */
-#define PIC32MX_FLASH_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f400)
+# define PIC32MX_FLASH_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f400)
/* Reset Control Register Base Address */
-#define PIC32MX_RESET_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f600)
+# define PIC32MX_RESET_K1BASE (PIC32MX_SFR_K1BASE + 0x0000f600)
/* Interrupt Register Base Address */
-#define PIC32MX_INT_K1BASE (PIC32MX_SFR_K1BASE + 0x00081000)
+# define PIC32MX_INT_K1BASE (PIC32MX_SFR_K1BASE + 0x00081000)
/* Bus Matrix Register Base Address */
-#define PIC32MX_BMX_K1BASE (PIC32MX_SFR_K1BASE + 0x00082000)
+# define PIC32MX_BMX_K1BASE (PIC32MX_SFR_K1BASE + 0x00082000)
/* DMA Register Base Address */
-#define PIC32MX_DMA_K1BASE (PIC32MX_SFR_K1BASE + 0x00083000)
-#define PIC32MX_DMACH_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00083060 + 0xc0*(n))
-#define PIC32MX_DMACH0_K1BASE (PIC32MX_SFR_K1BASE + 0x00083060)
-#define PIC32MX_DMACH1_K1BASE (PIC32MX_SFR_K1BASE + 0x00083120)
-#define PIC32MX_DMACH2_K1BASE (PIC32MX_SFR_K1BASE + 0x000831e0)
-#define PIC32MX_DMACH3_K1BASE (PIC32MX_SFR_K1BASE + 0x000832a0)
+# define PIC32MX_DMA_K1BASE (PIC32MX_SFR_K1BASE + 0x00083000)
+# define PIC32MX_DMACH_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00083060 + 0xc0*(n))
+# define PIC32MX_DMACH0_K1BASE (PIC32MX_SFR_K1BASE + 0x00083060)
+# define PIC32MX_DMACH1_K1BASE (PIC32MX_SFR_K1BASE + 0x00083120)
+# define PIC32MX_DMACH2_K1BASE (PIC32MX_SFR_K1BASE + 0x000831e0)
+# define PIC32MX_DMACH3_K1BASE (PIC32MX_SFR_K1BASE + 0x000832a0)
/* Prefetch Register Base Address */
-#define PIC32MX_CHE_K1BASE (PIC32MX_SFR_K1BASE + 0x00084000)
+# define PIC32MX_CHE_K1BASE (PIC32MX_SFR_K1BASE + 0x00084000)
/* USB2 Register Base Addresses */
-#define PIC32MX_USB_K1BASE (PIC32MX_SFR_K1BASE + 0x00085000)
+# define PIC32MX_USB_K1BASE (PIC32MX_SFR_K1BASE + 0x00085000)
/* Port Register Base Addresses */
-#define PIC32MX_IOPORTA 0
-#define PIC32MX_IOPORTB 1
-#define PIC32MX_IOPORTC 2
-#define PIC32MX_IOPORTD 3
-#define PIC32MX_IOPORTE 4
-#define PIC32MX_IOPORTF 5
-#define PIC32MX_IOPORTG 6
-#define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
-
-#define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
-#define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
-#define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
-#define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
-#define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
-#define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
-#define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
-
-#define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
-
-/****************************************************************************
+# define PIC32MX_IOPORTA 0
+# define PIC32MX_IOPORTB 1
+# define PIC32MX_IOPORTC 2
+# define PIC32MX_IOPORTD 3
+# define PIC32MX_IOPORTE 4
+# define PIC32MX_IOPORTF 5
+# define PIC32MX_IOPORTG 6
+# define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
+
+# define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
+# define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
+# define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
+# define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
+# define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
+# define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
+# define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
+
+# define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
+
+#else
+# error "Memory map unknown for this PIC32 chip"
+#endif
+
+/************************************************************************************
* Public Types
- ****************************************************************************/
+ ************************************************************************************/
#ifndef __ASSEMBLY__
-/****************************************************************************
+/************************************************************************************
* Inline Functions
- ****************************************************************************/
+ ************************************************************************************/
-/****************************************************************************
+/************************************************************************************
* Public Function Prototypes
- ****************************************************************************/
+ ************************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
|