Basic SH-1 build environment

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1139 42af7a65-404d-4744-a932-0658087f49c3

10 files changed, 1368 insertions, 48 deletions

diff --git a/nuttx/arch/sh/include/irq.h b/nuttx/arch/sh/include/irq.h
index 075e0317a..cc847567d 100644
--- a/nuttx/arch/sh/include/irq.h
+++ b/nuttx/arch/sh/include/irq.h
@@ -155,54 +155,6 @@ struct xcptcontext
  * Inline functions
  ****************************************************************************/
 
-#ifndef __ASSEMBLY__
-
-/* Save the current interrupt enable state & disable IRQs */
-
-static inline irqstate_t irqsave(void)
-{
-  unsigned int flags;
-  unsigned int temp;
-  __asm__ __volatile__
-    (
-     "\tmrs    %0, cpsr\n"
-     "\torr    %1, %0, #128\n"
-     "\tmsr    cpsr_c, %1"
-     : "=r" (flags), "=r" (temp)
-     :
-     : "memory");
-  return flags;
-}
-
-/* Restore saved IRQ & FIQ state */
-
-static inline void irqrestore(irqstate_t flags)
-{
-  __asm__ __volatile__
-    (
-     "msr    cpsr_c, %0"
-     :
-     : "r" (flags)
-     : "memory");
-}
-
-static inline void system_call(swint_t func, int parm1,
-			       int parm2, int parm3)
-{
-  __asm__ __volatile__
-    (
-     "mov\tr0,%0\n\t"
-     "mov\tr1,%1\n\t"
-     "mov\tr2,%2\n\t"
-     "mov\tr3,%3\n\t"
-     "swi\t0x900001\n\t"
-     :
-     : "r" ((long)(func)),  "r" ((long)(parm1)),
-       "r" ((long)(parm2)), "r" ((long)(parm3))
-     : "r0", "r1", "r2", "r3", "lr");
-}
-#endif
-
 /****************************************************************************
  * Public Variables
  ****************************************************************************/
diff --git a/nuttx/arch/sh/include/sh1/irq.h b/nuttx/arch/sh/include/sh1/irq.h
index 795289c6f..ccc73ee98 100644
--- a/nuttx/arch/sh/include/sh1/irq.h
+++ b/nuttx/arch/sh/include/sh1/irq.h
@@ -90,6 +90,138 @@
 #define STR71X_FIQ_WDG        (0X00000002)
 #define STR71X_FIQ_WDGT0TIMIS (0X00000003)
 
+/* Vector table offets **************************************************************/
+
+/* Resets */
+
+#define SH1_PWRONPC_VECOFFSET  (0*4)   /* 0: Power-on reset (hard, NMI high) PC*/
+#define SH1_PWRONSP_VECOFFSET  (1*4)   /* 1: Power-on reset (hard, NMI high) SP */
+#define SH1_MRESETPC_VECOFFSET (2*4)   /* 2: Power-on reset (hard, NMI high) PC*/
+#define SH1_MRESETSP_VECOFFSET (3*4)   /* 3: Power-on reset (hard, NMI high) SP */
+
+/* Illegal instructions / Address errors */
+
+#define SH1_INVINSTR_VECOFFSET (4*4)   /* 4: General invalid instruction */
+                                       /* 5: Reserved for system */
+#define SH1_INVSLOT_VECOFFSET  (6*4)   /* 6: Invalid slot instruction */
+                                       /* 7-8: Reserved for system */
+#define SH1_BUSERR_VECOFFSET   (9*4)   /* 9: CPU bus error */
+#define SH1_DMAERR_VECOFFSET   (10*4)  /* 10: DMA bus error */
+
+/* NMI, user break */
+
+#define SH1_NMI_VECOFFSET      (11*4)  /* 11: NMI */
+#define SH1_USRBRK_VECOFFSET   (12*4)  /* 12: User break */
+                                       /* 13-31: Reserved for system */
+/* Trap instruction */
+
+#define SH1_TRAP_VECOFFSET     (32*4)  /* 32-63: TRAPA instruction (user break) */
+#define SH1_TRAP0_VECOFFSET    (32*4)  /* 32: TRAPA instruction (user break) */
+#define SH1_TRAP1_VECOFFSET    (33*4)  /* 33: TRAPA instruction (user break) */
+#define SH1_TRAP2_VECOFFSET    (34*4)  /* 34: TRAPA instruction (user break) */
+#define SH1_TRAP3_VECOFFSET    (35*4)  /* 35: TRAPA instruction (user break) */
+#define SH1_TRAP4_VECOFFSET    (36*4)  /* 36: TRAPA instruction (user break) */
+#define SH1_TRAP5_VECOFFSET    (37*4)  /* 37: TRAPA instruction (user break) */
+#define SH1_TRAP6_VECOFFSET    (38*4)  /* 38: TRAPA instruction (user break) */
+#define SH1_TRAP7_VECOFFSET    (39*4)  /* 39: TRAPA instruction (user break) */
+#define SH1_TRAP8_VECOFFSET    (40*4)  /* 40: TRAPA instruction (user break) */
+#define SH1_TRAP9_VECOFFSET    (41*4)  /* 41: TRAPA instruction (user break) */
+#define SH1_TRAP10_VECOFFSET   (42*4)  /* 42: TRAPA instruction (user break) */
+#define SH1_TRAP11_VECOFFSET   (43*4)  /* 43: TRAPA instruction (user break) */
+#define SH1_TRAP12_VECOFFSET   (44*4)  /* 44: TRAPA instruction (user break) */
+#define SH1_TRAP13_VECOFFSET   (45*4)  /* 45: TRAPA instruction (user break) */
+#define SH1_TRAP14_VECOFFSET   (46*4)  /* 46: TRAPA instruction (user break) */
+#define SH1_TRAP15_VECOFFSET   (47*4)  /* 47: TRAPA instruction (user break) */
+#define SH1_TRAP16_VECOFFSET   (48*4)  /* 48: TRAPA instruction (user break) */
+#define SH1_TRAP17_VECOFFSET   (49*4)  /* 49: TRAPA instruction (user break) */
+#define SH1_TRAP18_VECOFFSET   (50*4)  /* 50: TRAPA instruction (user break) */
+#define SH1_TRAP19_VECOFFSET   (51*4)  /* 51: TRAPA instruction (user break) */
+#define SH1_TRAP20_VECOFFSET   (52*4)  /* 52: TRAPA instruction (user break) */
+#define SH1_TRAP21_VECOFFSET   (53*4)  /* 53: TRAPA instruction (user break) */
+#define SH1_TRAP22_VECOFFSET   (54*4)  /* 54: TRAPA instruction (user break) */
+#define SH1_TRAP23_VECOFFSET   (55*4)  /* 55: TRAPA instruction (user break) */
+#define SH1_TRAP24_VECOFFSET   (56*4)  /* 56: TRAPA instruction (user break) */
+#define SH1_TRAP25_VECOFFSET   (57*4)  /* 57: TRAPA instruction (user break) */
+#define SH1_TRAP26_VECOFFSET   (58*4)  /* 58: TRAPA instruction (user break) */
+#define SH1_TRAP27_VECOFFSET   (59*4)  /* 59: TRAPA instruction (user break) */
+#define SH1_TRAP28_VECOFFSET   (60*4)  /* 60: TRAPA instruction (user break) */
+#define SH1_TRAP29_VECOFFSET   (61*4)  /* 61: TRAPA instruction (user break) */
+#define SH1_TRAP30_VECOFFSET   (62*4)  /* 62: TRAPA instruction (user break) */
+#define SH1_TRAP31_VECOFFSET   (63*4)  /* 63: TRAPA instruction (user break) */
+
+/* Interrupts */
+
+#define SH1_IRQ_VECOFFSET      (64*4)  /* 64-71: IRQ0-7 */
+#define SH1_IRQ0_VECOFFSET     (64*4)  /* 64: IRQ0 */
+#define SH1_IRQ1_VECOFFSET     (65*4)  /* 65: IRQ1 */
+#define SH1_IRQ2_VECOFFSET     (66*4)  /* 66: IRQ2 */
+#define SH1_IRQ3_VECOFFSET     (67*4)  /* 67: IRQ3 */
+#define SH1_IRQ4_VECOFFSET     (68*4)  /* 68: IRQ4 */
+#define SH1_IRQ5_VECOFFSET     (69*4)  /* 69: IRQ5 */
+#define SH1_IRQ6_VECOFFSET     (70*4)  /* 70: IRQ6 */
+#define SH1_IRQ7_VECOFFSET     (71*4)  /* 71: IRQ7 */
+
+/* On-chip modules -- The following may be unique to the 7032 */
+
+#ifdef CONFIG_ARCH_SH7032
+
+/* DMAC */
+
+#define SH1_DMAC0_VECOFFSET    (72*4)  /* 72-73: DMAC0 */
+#define SH1_DEI0_VECOFFSET     (72*4)  /* 72: DMAC0 DEI0 */
+                                       /* 73: Reserved */
+#define SH1_DMAC1_VECOFFSET    (74*4)  /* 74-75: DMAC1 */
+#define SH1_DEI1_VECOFFSET     (74*4)  /* 74: DMAC1 DEI1 */
+                                       /* 75: Reserved */
+#define SH1_DMAC2_VECOFFSET    (76*4)  /* 76-77: DMAC2 */
+#define SH1_DEI2_VECOFFSET     (76*4)  /* 76: DMAC2 DEI2 */
+                                       /* 77: Reserved */
+#define SH1_DMAC3_VECOFFSET    (78*4)  /* 78-79: DMAC3 */
+#define SH1_DEI3_VECOFFSET     (78*4)  /* 78: DMAC3 DEI3 */
+                                       /* 79: Reserved */
+/* ITU */
+
+#define SH1_IMIA0_VECOFFSET    (80*4)  /* 80: ITU0 IMIA0 */
+#define SH1_IMIBO_VECOFFSET    (81*4)  /* 81:      IMIB0 */
+#define SH1_OVI0_VECOFFSET     (82*4)  /* 82:      OVI0 */
+                                       /* 83:      Reserved */
+#define SH1_IMIA1_VECOFFSET    (84*4)  /* 84: ITU1 IMIA1 */
+#define SH1_IMIB1_VECOFFSET    (85*4)  /* 85:      IMIB1 */
+#define SH1_OVI1_VECOFFSET     (86*4)  /* 86:      OVI1 */
+                                       /* 87:      Reserved */
+#define SH1_IMIA2_VECOFFSET    (88*4)  /* 88: ITU2 IMIA2 */
+#define SH1_IMIB2_VECOFFSET    (89*4)  /* 89:      IMIB2 */
+#define SH1_OVI2_VECOFFSET     (90*4)  /* 90:      OVI2 */
+                                       /* 91:      Reserved */
+#define SH1_IMIA3_VECOFFSET    (92*4)  /* 92: ITU3 IMIA3 */
+#define SH1_IMIB3_VECOFFSET    (93*4)  /* 93:      IMIB3 */
+#define SH1_OVI3_VECOFFSET     (94*4)  /* 94:      OVI3 */
+                                       /* 95:      Reserved */
+#define SH1_IMIA4_VECOFFSET    (96*4)  /* 96: ITU4 IMIA4 */
+#define SH1_IMIB4_VECOFFSET    (97*4)  /* 97:      IMIB4 */
+#define SH1_OVI4_VECOFFSET     (98*4)  /* 98:      OVI4 */
+                                       /* 99:      Reserved */
+/* SCI */
+
+#define SH1_ERI0_VECOFFET      (100*4) /* 100: SCI0 ERI0 */
+#define SH1_RXI0_VECOFFET      (101*4) /* 101:      RxI0 */
+#define SH1_TXI0_VECOFFET      (102*4) /* 102:      TxI0 */
+#define SH1_TEI0_VECOFFET      (103*4) /* 103:      TEI0 */
+
+#define SH1_ERI1_VECOFFET      (104*4) /* 104: SCI1 ERI1 */
+#define SH1_RXI1_VECOFFET      (105*4) /* 105:      RxI1 */
+#define SH1_TXI1_VECOFFET      (106*4) /* 106:      TxI1 */
+#define SH1_TEI1_VECOFFET      (107*4) /* 107:      TEI1 */
+
+#define SH1_PEI_VECOFFSET      (108*4) /* 108: Parity control unit PEI */
+#define SH1_ADITI_VECOFFSET    (109*4) /* 109: A/D ITI */
+                                       /* 110-111: Reserved */
+#define SH1_WDTITI_VECOFFSET   (112*4) /* 112: WDT ITI */
+#define SH1_CMI_VECOFFSET      (113*4) /* 113: REF CMI */
+                                       /* 114-115: Reserved */
+/* 116-255 reserved */
+#endif
+
 /************************************************************************************
  * Public Types
  ************************************************************************************/
@@ -107,6 +239,85 @@ extern "C" {
 #endif
 
 /************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Return the current interrupt enable state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  irqstate_t flags;
+  uint32 tmp;
+
+  __asm__ __volatile__
+    (
+      "stc     sr, %1\n\t"
+      "mov     %1, %0\n\t"
+      "or      #0xf0, %0\n\t"
+      "ldc     %0, sr\n\t"
+      "mov     %1, %0\n\t"
+      "and     #0xf0, %0"
+      : "=&z" (flags), "=&r" (tmp)
+      :
+      : "memory"
+    );
+  return flags;
+}
+
+/* Disable IRQs */
+
+static inline void irqdisable(void)
+{
+  unsigned long tmp;
+
+  __asm__ __volatile__
+    (
+      "stc     sr, %0\n\t"
+      "or      #0xf0, %0\n\t"
+      "ldc     %0, sr"
+      : "=&z" (tmp)
+      :
+      : "memory"
+    );
+}
+/* Enable IRQs */
+
+static inline void irqenable(void)
+{
+  uint32 tmp1;
+  uint32 tmp2;
+
+  __asm__ __volatile__
+    (
+      "stc     sr, %0\n\t"
+      "and     %1, %0\n\t"
+      "stc     r6_bank, %1\n\t"
+      "or      %1, %0\n\t"
+      "ldc     %0, sr"
+      : "=&r" (tmp1), "=r" (tmp2)
+      : "1" (~0x000000f0)
+      : "memory"
+    );
+}
+
+/* Restore saved IRQ state */
+
+static inline void irqrestore(irqstate_t flags)
+{
+  if ((flags & 0x000000f0) != 0x000000f0)
+    {
+      irqenable();
+    }
+  else
+    {
+      irqdisable();
+    }
+}
+#endif
+
+/************************************************************************************
  * Public Functions
  ************************************************************************************/
 
diff --git a/nuttx/arch/sh/src/Makefile b/nuttx/arch/sh/src/Makefile
new file mode 100644
index 000000000..d0aca52fe
--- /dev/null
+++ b/nuttx/arch/sh/src/Makefile
@@ -0,0 +1,122 @@
+############################################################################
+# arch/sh/src/Makefile
+#
+#   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+-include chip/Make.defs
+
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+CFLAGS		+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(TOPDIR)/sched
+
+HEAD_AOBJ	= $(HEAD_ASRC:.S=$(OBJEXT))
+
+ASRCS		= $(CHIP_ASRCS) $(CMN_ASRCS)
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+
+CSRCS		= $(CHIP_CSRCS) $(CMN_CSRCS)
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+LDFLAGS		= $(ARCHSCRIPT)
+EXTRA_LIBS	=
+
+LINKLIBS	=
+LDPATHES	= $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
+LDLIBS		= $(patsubst lib%,-l%,$(basename $(notdir $(LINKLIBS))))
+
+BOARDDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src/board
+
+LIBGCC		= ${shell $(CC) -print-libgcc-file-name}
+
+VPATH		= chip:common
+
+all: $(HEAD_OBJ) libarch$(LIBEXT)
+
+$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libarch$(LIBEXT): $(OBJS)
+	@( for obj in $(OBJS) ; do \
+		$(call ARCHIVE, $@, $${obj}); \
+	done ; )
+
+board/libboard$(LIBEXT):
+	$(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT)
+
+nuttx: $(HEAD_AOBJ) board/libboard$(LIBEXT)
+	@echo "LD: nuttx"
+	@$(LD) --entry=__start $(LDFLAGS) $(LDPATHES) -L$(BOARDDIR) -o $(TOPDIR)/$@ $(HEAD_AOBJ) \
+		--start-group $(LDLIBS) -lboard --end-group $(EXTRA_LIBS) $(LIBGCC)
+ifeq ($(CONFIG_BOOT_FROM_FLASH),y)
+	@export flashloc=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _eronly | cut -d' ' -f1`;  \
+	$(OBJCOPY) --adjust-section-vma=.data=0x$$flashloc $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage
+	@mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@
+endif
+	@$(NM) $(TOPDIR)/$@ | \
+	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+	sort > $(TOPDIR)/System.map
+	@export vflashstart=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _vflashstart | cut -d' ' -f1`;  \
+	if [ ! -z "$$vflashstart" ]; then \
+		$(OBJCOPY) --adjust-section-vma=.vector=0x$$vflashstart $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage; \
+		mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@; \
+	fi
+
+.depend: Makefile chip/Make.defs $(SRCS)
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR="$(TOPDIR)" depend ; \
+	fi
+	@$(MKDEP) --dep-path chip --dep-path common $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@touch $@
+
+depend: .depend
+
+clean:
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR="$(TOPDIR)" clean ; \
+	fi
+	@rm -f libarch$(LIBEXT) *~ .*.swp
+	$(call CLEAN)
+
+distclean: clean
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR="$(TOPDIR)" distclean ; \
+	fi
+	@rm -f Make.dep .depend
+
+-include Make.dep
diff --git a/nuttx/arch/sh/src/common/up_arch.h b/nuttx/arch/sh/src/common/up_arch.h
new file mode 100644
index 000000000..ae94c03f8
--- /dev/null
+++ b/nuttx/arch/sh/src/common/up_arch.h
@@ -0,0 +1,70 @@
+/****************************************************************************
+ * arch/sh/src/common/up_arch.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef ___ARCH_SH_SRC_COMMON_UP_ARCH_H
+#define ___ARCH_SH_SRC_COMMON_UP_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+# include <sys/types.h>
+#endif
+
+#include <arch/board/board.h>
+#include "chip.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+# define getreg8(a)           (*(volatile ubyte *)(a))
+# define putreg8(v,a)         (*(volatile ubyte *)(a) = (v))
+# define getreg16(a)          (*(volatile uint16 *)(a))
+# define putreg16(v,a)        (*(volatile uint16 *)(a) = (v))
+# define getreg32(a)          (*(volatile uint32 *)(a))
+# define putreg32(v,a)        (*(volatile uint32 *)(a) = (v))
+
+#endif
+
+#endif  /* ___ARCH_SH_SRC_COMMON_UP_ARCH_H */
diff --git a/nuttx/arch/sh/src/common/up_internal.h b/nuttx/arch/sh/src/common/up_internal.h
new file mode 100644
index 000000000..7c071c2d5
--- /dev/null
+++ b/nuttx/arch/sh/src/common/up_internal.h
@@ -0,0 +1,210 @@
+/****************************************************************************
+ * arch/sh/src/common/up_internal.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+#ifndef ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H
+#define ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Bring-up debug configurations.  These are here (vs defconfig)
+ * because these should only be controlled during low level
+ * board bring-up and not part of normal platform configuration.
+ */
+
+#undef  CONFIG_SUPPRESS_INTERRUPTS    /* DEFINED: Do not enable interrupts */
+#undef  CONFIG_SUPPRESS_TIMER_INTS    /* DEFINED: No timer */
+#undef  CONFIG_SUPPRESS_SERIAL_INTS   /* DEFINED: Console will poll */
+#undef  CONFIG_SUPPRESS_UART_CONFIG   /* DEFINED: Do not reconfig UART */
+#undef  CONFIG_DUMP_ON_EXIT           /* DEFINED: Dump task state on exit */
+
+/* Determine which (if any) console driver to use */
+
+#if CONFIG_NFILE_DESCRIPTORS == 0 || defined(CONFIG_DEV_LOWCONSOLE)
+#  undef CONFIG_USE_SERIALDRIVER
+#  undef CONFIG_USE_EARLYSERIALINIT
+#elif defined(CONFIG_DEV_CONSOLE) && CONFIG_NFILE_DESCRIPTORS > 0
+#  define CONFIG_USE_SERIALDRIVER 1
+#  define CONFIG_USE_EARLYSERIALINIT 1
+#endif
+
+/* Check if an interrupt stack size is configured */
+
+#ifndef CONFIG_ARCH_INTERRUPTSTACK
+# define CONFIG_ARCH_INTERRUPTSTACK 0
+#endif
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+typedef void (*up_vector_t)(void);
+#endif
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level
+ * register storage structure.  If is non-NULL only during
+ * interrupt processing.
+ */
+
+extern uint32 *current_regs;
+
+/* This is the beginning of heap as provided from up_head.S.
+ * This is the first address in DRAM after the loaded
+ * program+bss+idle stack.  The end of the heap is
+ * CONFIG_DRAM_END
+ */
+
+extern uint32 g_heapbase;
+
+/* Address of the saved user stack pointer */
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+extern uint32 g_userstack;
+#endif
+#endif
+
+/****************************************************************************
+ * Inline Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Defined in files with the same name as the function */
+
+extern void up_boot(void);
+extern void up_copystate(uint32 *dest, uint32 *src);
+extern void up_dataabort(uint32 *regs);
+extern void up_decodeirq(uint32 *regs);
+extern void up_doirq(int irq, uint32 *regs);
+extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
+extern void up_irqinitialize(void);
+extern void up_prefetchabort(uint32 *regs);
+extern int  up_saveusercontext(uint32 *regs);
+extern void up_sigdeliver(void);
+extern void up_syscall(uint32 *regs);
+extern int  up_timerisr(int irq, uint32 *regs);
+extern void up_undefinedinsn(uint32 *regs);
+extern void up_lowputc(char ch);
+extern void up_puts(const char *str);
+extern void up_lowputs(const char *str);
+
+/* Defined in up_vectors.S */
+
+extern void up_vectorundefinsn(void);
+extern void up_vectorswi(void);
+extern void up_vectorprefetch(void);
+extern void up_vectordata(void);
+extern void up_vectoraddrexcptn(void);
+extern void up_vectorirq(void);
+extern void up_vectorfiq(void);
+
+/* Defined in up_serial.c */
+
+#if CONFIG_NFILE_DESCRIPTORS > 0
+extern void up_earlyserialinit(void);
+extern void up_serialinit(void);
+#else
+# define up_earlyserialinit()
+# define up_serialinit()
+#endif
+
+/* Defined in drivers/lowconsole.c */
+
+#ifdef CONFIG_DEV_LOWCONSOLE
+extern void lowconsole_init(void);
+#else
+# define lowconsole_init()
+#endif
+
+/* Defined in up_watchdog.c */
+
+extern void up_wdtinit(void);
+
+/* Defined in up_timerisr.c */
+
+extern void up_timerinit(void);
+
+/* Defined in up_irq.c */
+
+extern void up_maskack_irq(int irq);
+
+/* Defined in board/up_leds.c */
+
+#ifdef CONFIG_ARCH_LEDS
+extern void up_ledinit(void);
+extern void up_ledon(int led);
+extern void up_ledoff(int led);
+#else
+# define up_ledinit()
+# define up_ledon(led)
+# define up_ledoff(led)
+#endif
+
+/* Defined in board/up_network.c */
+
+#ifdef CONFIG_NET
+extern void up_netinitialize(void);
+#else
+# define up_netinitialize()
+#endif
+
+/* USB */
+
+#ifdef CONFIG_USBDEV
+extern void up_usbinitialize(void);
+extern void up_usbuninitialize(void);
+#else
+# define up_usbinitialize()
+# define up_usbuninitialize()
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif  /* ___ARCH_SH_SRC_COMMON_UP_INTERNAL_H */
diff --git a/nuttx/arch/sh/src/sh1/Make.defs b/nuttx/arch/sh/src/sh1/Make.defs
new file mode 100644
index 000000000..2f7a7b3e9
--- /dev/null
+++ b/nuttx/arch/sh/src/sh1/Make.defs
@@ -0,0 +1,51 @@
+##############################################################################
+# arch/sh/src/sh1/Make.defs
+#
+#   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+##############################################################################
+
+HEAD_ASRC	= sh1_head.S
+
+CMN_ASRCS	= 
+CMN_CSRCS	= 
+
+ifneq ($(CONFIG_DISABLE_SIGNALS),y)
+CMN_CSRCS	+= 
+endif
+
+CHIP_ASRCS	= 
+CHIP_CSRCS	= sh1_lowputc.c sh1_irq.c
+
+ifeq ($(CONFIG_USBDEV),y)
+CHIP_CSRCS	+= 
+endif
+
diff --git a/nuttx/arch/sh/src/sh1/chip.h b/nuttx/arch/sh/src/sh1/chip.h
new file mode 100644
index 000000000..7936eb1ff
--- /dev/null
+++ b/nuttx/arch/sh/src/sh1/chip.h
@@ -0,0 +1,62 @@
+/************************************************************************************
+ * arch/sh/src/sh1/chip.h
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_SH_SRC_SH1_CHIP_H
+#define __ARCH_SH_SRC_SH1_CHIP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_SH_SRC_SH1_CHIP_H */
diff --git a/nuttx/arch/sh/src/sh1/sh1_head.S b/nuttx/arch/sh/src/sh1/sh1_head.S
new file mode 100644
index 000000000..f93ca8e6d
--- /dev/null
+++ b/nuttx/arch/sh/src/sh1/sh1_head.S
@@ -0,0 +1,339 @@
+/*****************************************************************************
+ * arch/sh/src/sh1/sh1_head.S
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Included Files
+ *****************************************************************************/
+
+#include <nuttx/config.h>	/* NuttX configuration settings */
+#include <arch/board/board.h>	/* Board-specific settings */
+#include <arch/irq.h>		/* IRQ definitons */
+
+#include "chip.h"		/* Chip-specific settings */
+#include "up_internal.h"
+#include "up_arch.h"
+
+/*****************************************************************************
+ * Definitions
+ *****************************************************************************/
+
+/* This file holds the NuttX start logic that runs when the SH-1/US7032EVB1
+ * is reset.  This logic must be located in SRAM at 0x0a00:2000.  On that
+ * platform, the entire PROM and the first 8Kb of SRAM are reserved for CMON.
+ */
+
+/*****************************************************************************
+ * External references
+ *****************************************************************************/
+
+/* Called functions */
+
+	.globl	_up_lowsetup		/* Early initialization of UART */
+#ifdef CONFIG_USE_EARLYSERIALINIT
+	.globl	_up_earlyserialinit	/* Early initialization of serial driver */
+#endif
+#ifdef CONFIG_ARCH_LEDS
+	.globl	_up_ledinit		/* Boot LED setup */
+#endif
+#ifdef CONFIG_DEBUG
+	.globl	_up_lowputc		/* Low-level debug output */
+#endif
+	.globl	_os_start		/* NuttX entry point */
+
+/* Variables set up by the linker script */
+
+	.globl	_sbss			/* Start of BSS */
+	.globl	_ebss			/* End of BSS */
+
+#ifdef CONFIG_BOOT_FROM_FLASH
+	.globl	_eronly			/* Where .data defaults are stored in FLASH */
+	.global	_sdata			/* Start of .data in RAM */
+	.globl	_edata			/* End of .data in RAM */
+#endif
+
+/*****************************************************************************
+ * Macros
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Name: showprogress
+ *
+ * Description:
+ *   Print a character on the UART to show boot status. This macro will
+ *   modify r0, r1, r2 and r14
+ *
+ *****************************************************************************/
+
+	.macro	showprogress, code
+#ifdef CONFIG_DEBUG
+	mov	r0, #\code
+	bl	up_lowputc
+	mov.l   .Llowputc, r0		/* Address of up_earlyserialinit */
+	jsr     @r0			/* Call it */
+	or      r0, r0			/* Delay slot */
+#endif
+	.endm
+
+/*****************************************************************************
+ * Vectors
+ *****************************************************************************/
+
+	.section	.vect
+
+/*****************************************************************************
+ * Name: __vector_table
+ *
+ * Description:
+ *   Interrupt vector table.  The actual vectors are managed by CMON.  For
+ *   any non-zero settings in the following table, CMON will redirect interrupt
+ *   handling to that function.
+ *
+ *****************************************************************************/
+
+	.globl		__vector_table
+	.type		__vector_table, %object
+__vector_table:
+	/* Resets */
+
+	.long	__start		/* 0-1: Power-on reset (hard, NMI high) PC & SP */
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+	.long	__start		/* 2-3: Manual reset (soft, NMI low) PC & SP */
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+
+	.rept 252
+	.long	0
+	.endr
+
+	.size	__vector_table, . - __vector_table
+
+/*****************************************************************************
+ * Text
+ *****************************************************************************/
+
+	.section	.text
+
+/*****************************************************************************
+ * Name: __start
+ *
+ * Description:
+ *   Reset entry point.  This is the first function to execute when the
+ *   processor is reset.  It initializes hardware and then gives control to
+ *   NuttX.  Nearly all SH-1 resources have already been setup by CMON so all
+ *   that is necessary for us to do here is setup the stack pointer and BSS.
+ *
+ *****************************************************************************/
+
+	.global __start
+	.type	__start, #function
+
+__start:
+	/* Initialize stack pointer to the preallocated stack */
+	mov.l	.Lstack, r15
+	
+	/* set up the bus controller for the EVB */
+
+	mov.l	.Lwcr1, r0
+	sub	r1,r1
+	mov.w	r1, @r0
+
+	/* Configure the BSR to use /LBS, /HBS, /WR */
+
+	mov.l   .Lbcr, r0
+	mov.w   .Lbas, r1
+	bra     __start0
+	mov.w   r1, @r0
+	
+	.align 2
+.Lstack:
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+.Lwcr1:
+	.long	0x5ffffa2
+.Lbcr:
+	.long  0x5ffffa0
+.Lbas:
+	.word  0x0800
+
+__start0:
+	/* Copy the monitor vectors to a002000-a00211f */
+
+	mov	#0, r0			/* R0: Monitor vector table at address 0 in PROM */
+	mov.l	.Lramvectab, r1		/* R1: Redirected vector table in SRAM */
+	mov.l	.Lvectend, r3		/* R3: Copy only up to external interrupts */
+1:
+	mov.l	@r0, r2			/* R2: Value from mnitor monitor vector table */
+	mov.l	r2, @r1			/* Write into SRAM vector table */
+	add	#4, r0			/* R0: Address of next vector to read from monitor vector table */
+	add	#4, r1			/* R1: Address of next vector to write to SRAM vector table */
+	cmp/gt	r0, r3			/* Copy only only up to external interrupts at */
+	bt	1b			/* Continue looping until all copied */
+
+	/* Update the VBR to show new adddress of vector table */
+
+	mov.l	.Lramvectab, r0		/* R0: Address of SRAM vector table */
+	ldc	r0, vbr			/* Set VBR to start of SRAM vector table */
+
+	/* Initialize data segement */
+
+#ifdef CONFIG_BOOT_FROM_FLASH
+	mov.l	.Lsdata, r0		/* R0: Start of .data segment */
+	mov.l	.Ledata, r1		/* R1: End+1 of .data segment */
+	mov.l	.Leronly, r2		/* R2: Start of FLASH .data segment copy */
+2:
+	mov.l	@r2, r3			/* R3: Next byte from FLASH copy */
+	mov.l	r3, @r0			/* Copy to .data */
+	add	#4, r2			/* R2: Address of next byte to read from FLASH */
+	add	#4, r0			/* R0: Address to write next byte to .data */
+	cmp/gt	r0, r1			/* End of .data? */
+	bt	2b			/* Loop until end of data */
+#endif
+
+	/* Clear BSS */
+
+	mov.l   .Lsbss, r0		/* R0: Start of BSS segment */
+	mov.l   .Lebss, r1		/* R1: End+1 of BSS segment */
+	mov	#0, r2			/* R2: Value = 0 */
+3:
+	mov.l	r2, @r0			/* Clear the next word in BSS */
+	add	#4, r0			/* R0: Address of next byte to clear in BSS */
+	cmp/ge	r0, r1			/* End of BSS? */
+	bt	3b			/* Loop until the end of BSS */
+
+	/* Configure the uart so that we can get debug output as soon
+	 * as possible.
+	 */
+
+	mov.l   .Llowsetup, r0		/* Address of up_lowsetup */
+	jsr     @r0			/* Call it */
+	or      r0, r0			/* Delay slot */
+
+	showprogress 'A'
+
+	/* Perform early serial initialization */
+
+#ifdef CONFIG_USE_EARLYSERIALINIT
+	mov.l   .Learlyser, r0		/* Address of up_earlyserialinit */
+	jsr     @r0			/* Call it */
+	or      r0, r0			/* Delay slot */
+#endif
+
+	showprogress 'B'
+
+	/* Call C++ constructors */
+
+#ifdef CONFIG_CPLUSPLUS
+#  warning "No C++ support yet"
+	showprogress 'C'
+#endif
+	showprogress '\n'
+
+	/* Initialize onboard LEDs */
+
+#ifdef CONFIG_ARCH_LEDS
+	mov.l   .Lledinit, r0		/* Address of up_ledinit */
+	jsr     @r0			/* Call it */
+	or      r0, r0			/* Delay slot */
+#endif
+
+	/* Then jump to NuttX entry */
+
+	mov.l   .Losstart,r0
+	jsr     @r0
+	or      r0, r0
+
+	/* Shouldn't get here */
+
+	/* Call destructors  -- never get here */
+
+#ifdef CONFIG_CPLUSPLUS
+#  warning "No C++ support yet"
+#endif
+
+4:  nop
+	bra 4b
+	nop
+
+	.align 2
+#ifdef CONFIG_BOOT_FROM_FLASH
+.Leronly:
+	.long   _eronly
+.Lsdata:
+	.long   _sdata
+.Ledata:
+	.long   _edata
+#endif
+.Lsbss:  
+	.long   _sbss
+.Lebss:
+	.long   _ebss
+#ifdef CONFIG_USE_EARLYSERIALINIT
+.Learlyser:
+	.long	_up_earlyserialinit
+#endif
+.Llowsetup:
+	.long	_up_lowsetup
+#ifdef CONFIG_DEBUG
+.Llowputc:
+	.long	_up_lowputc
+#endif
+.Lledinit:
+	.long	_up_ledinit
+.Losstart:
+	.long   _os_start
+.Lramvectab:
+	.long   0xa002000
+.Lvectend:
+	.long   (SH1_IRQ7_VECOFFSET+3)
+
+/*****************************************************************************
+ * DATA
+ *****************************************************************************/
+
+	.section	.data
+
+	/* This global variable is unsigned long g_heapbase and is
+	 * exported from here only because of its coupling to the stack
+	 * above.
+	 */
+
+	.data
+	.align	4
+	.globl	g_heapbase
+	.type	g_heapbase, object
+g_heapbase:
+	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.size	g_heapbase, .-g_heapbase
+
+	.end
+
diff --git a/nuttx/arch/sh/src/sh1/sh1_irq.c b/nuttx/arch/sh/src/sh1/sh1_irq.c
new file mode 100644
index 000000000..47eed797b
--- /dev/null
+++ b/nuttx/arch/sh/src/sh1/sh1_irq.c
@@ -0,0 +1,143 @@
+/****************************************************************************
+ * arch/sh/src/sh1/sh1_irq.c
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <nuttx/irq.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "chip.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+uint32 *current_regs;
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Funtions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_irqinitialize
+ ****************************************************************************/
+
+void up_irqinitialize(void)
+{
+#warning "To be provided"
+
+  /* Currents_regs is non-NULL only while processing an interrupt */
+
+  current_regs = NULL;
+
+  /* Enable interrupts */
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+# warning "enable value needed"
+  irqrestore(0);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   Disable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_disable_irq(int irq)
+{
+#warning "To be provided"
+}
+
+/****************************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   Enable the IRQ specified by 'irq'
+ *
+ ****************************************************************************/
+
+void up_enable_irq(int irq)
+{
+#warning "To be provided"
+}
+
+/****************************************************************************
+ * Name: up_maskack_irq
+ *
+ * Description:
+ *   Mask the IRQ and acknowledge it
+ *
+ ****************************************************************************/
+
+void up_maskack_irq(int irq)
+{
+#warning "To be provided"
+}
+
+/****************************************************************************
+ * Name: up_irqpriority
+ *
+ * Description:
+ *   set interrupt priority
+ *
+ ****************************************************************************/
+
+#warning "Should this be supported?"
+int up_irqpriority(int irq, ubyte priority)
+{
+#warning "To be provided"
+}
+
diff --git a/nuttx/arch/sh/src/sh1/sh1_lowputc.c b/nuttx/arch/sh/src/sh1/sh1_lowputc.c
new file mode 100644
index 000000000..0fd046984
--- /dev/null
+++ b/nuttx/arch/sh/src/sh1/sh1_lowputc.c
@@ -0,0 +1,160 @@
+/**************************************************************************
+ * arch/sh/src/sh1/sh1_lowputc.c
+ *
+ *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+
+/**************************************************************************
+ * Private Definitions
+ **************************************************************************/
+
+/* Configuration **********************************************************/
+
+/* Is there a serial console? */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE)
+#  define HAVE_CONSOLE
+#else
+#  undef HAVE_CONSOLE
+#endif
+
+/* Select UART parameters for the selected console */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+#  define SH1_UART_BASE     
+#  define SH1_UART_BAUD     CONFIG_UART0_BAUD
+#  define SH1_UART_BITS     CONFIG_UART0_BITS
+#  define SH1_UART_PARITY   CONFIG_UART0_PARITY
+#  define SH1_UART_2STOP    CONFIG_UART0_2STOP
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#  define SH1_UART_BASE     
+#  define SH1_UART_BAUD     CONFIG_UART1_BAUD
+#  define SH1_UART_BITS     CONFIG_UART1_BITS
+#  define SH1_UART_PARITY   CONFIG_UART1_PARITY
+#  define SH1_UART_2STOP    CONFIG_UART1_2STOP
+#else
+#  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
+#endif
+
+/* Get mode setting */
+
+#if SH1_UART_BITS == 7
+#  define SH1_UARTCR_MODE
+#elif SH1_UART_BITS == 8
+# define SH1_UARTCR_MODE SH1_UARTCR_MODE8BITP
+#else
+#  error "Number of bits not supported"
+#endif
+
+#if SH1_UART_PARITY == 0 || SH1_UART_PARITY == 2
+#  define SH1_UARTCR_PARITY
+#elif SH1_UART_PARITY == 1
+#  define SH1_UARTCR_PARITY SH1_UARTCR_PARITYODD
+#else
+#  error "Invalid parity selection"
+#endif
+
+#if SH1_UART_2STOP != 0
+#  define SH1_UARTCR_STOP 
+#else
+#  define SH1_UARTCR_STOP 
+#endif
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/**************************************************************************
+ * Global Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_lowputc
+ *
+ * Description:
+ *   Output one byte on the serial console
+ *
+ **************************************************************************/
+
+void up_lowputc(char ch)
+{
+#ifdef HAVE_CONSOLE
+# warning "To be provided"
+#endif
+}
+
+/**************************************************************************
+ * Name: up_lowsetup
+ *
+ * Description:
+ *   This performs basic initialization of the UART used for the serial
+ *   console.  Its purpose is to get the console output availabe as soon
+ *   as possible.
+ *
+ **************************************************************************/
+
+void up_lowsetup(void)
+{
+#ifdef HAVE_CONSOLE
+# warning "To be provided"
+#endif
+}
+
+