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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-01-11 18:19:09 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-01-11 18:19:09 +0000 |
commit | 3b0eb489665d4d8422d34309a13b20fcf65f637a (patch) | |
tree | 865e706cf0ed1dbe84005bee16774f4f97055b4b /nuttx/arch/z16/include/z16f | |
parent | ddfaa63ee4ff54b4f875b33cc62823fe73419164 (diff) | |
download | px4-nuttx-3b0eb489665d4d8422d34309a13b20fcf65f637a.tar.gz px4-nuttx-3b0eb489665d4d8422d34309a13b20fcf65f637a.tar.bz2 px4-nuttx-3b0eb489665d4d8422d34309a13b20fcf65f637a.zip |
untest z16f code
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@553 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/z16/include/z16f')
-rw-r--r-- | nuttx/arch/z16/include/z16f/irq.h | 67 |
1 files changed, 39 insertions, 28 deletions
diff --git a/nuttx/arch/z16/include/z16f/irq.h b/nuttx/arch/z16/include/z16f/irq.h index bcea8806c..e2ffd58b8 100644 --- a/nuttx/arch/z16/include/z16f/irq.h +++ b/nuttx/arch/z16/include/z16f/irq.h @@ -50,36 +50,47 @@ ****************************************************************************/ /* Interrupt Vectors */ - -#define Z16F_IRQ_RESET ( 0) /* Vector: 0x04 Reset */ -#define Z16F_IRQ_SYSEXC ( 1) /* Vector: 0x08 Sysexec */ -#define Z16F_IRQ_TIMER2 ( 2) /* Vector: 0x10 Timer 2 */ -#define Z16F_IRQ_TIMER1 ( 3) /* Vector: 0x14 Timer 1 */ -#define Z16F_IRQ_TIMER0 ( 4) /* Vector: 0x18 Timer 0 */ -#define Z16F_IRQ_UART0RX ( 5) /* Vector: 0x1C UART0 RX */ -#define Z16F_IRQ_UART0TX ( 6) /* Vector: 0x20 UART0 TX */ -#define Z16F_IRQ_I2C ( 7) /* Vector: 0x24 I2C */ -#define Z16F_IRQ_SPI ( 8) /* Vector: 0x28 SPI */ -#define Z16F_IRQ_ADC ( 9) /* Vector: 0x2C ADC */ -#define Z16F_IRQ_P7AD (10) /* Vector: 0x30 P7AD */ -#define Z16F_IRQ_P6AD (11) /* Vector: 0x34 P6AD */ -#define Z16F_IRQ_P5AD (12) /* Vector: 0x38 P5AD */ -#define Z16F_IRQ_P4AD (13) /* Vector: 0x3C P4AD */ -#define Z16F_IRQ_P3AD (14) /* Vector: 0x40 P3AD */ -#define Z16F_IRQ_P2AD (15) /* Vector: 0x44 P2AD */ -#define Z16F_IRQ_P1AD (16) /* Vector: 0x48 P1AD */ -#define Z16F_IRQ_P0AD (17) /* Vector: 0x4C P0AD */ -#define Z16F_IRQ_PWMTIMER (18) /* Vector: 0x50 PWM Timer */ -#define Z16F_IRQ_UART1RX (19) /* Vector: 0x54 UART1 RX */ -#define Z16F_IRQ_UART1TX (20) /* Vector: 0x58 UART1 TX */ -#define Z16F_IRQ_PWMFAULT (21) /* Vector: 0x5C PWM Fault */ -#define Z16F_IRQ_C3 (22) /* Vector: 0x60 C3 */ -#define Z16F_IRQ_C2 (23) /* Vector: 0x64 C2 */ -#define Z16F_IRQ_C1 (24) /* Vector: 0x68 C1 */ -#define Z16F_IRQ_C0 (25) /* Vector: 0x6C C0 */ + +#define Z16F_IRQ_SYSEXC ( 0) /* Vector: 0x08 System Exceptions */ + +#define Z16F_IRQ_IRQ0 ( 1) /* First of 8 IRQs controlled by IRQ0 registers */ +#define Z16F_IRQ_ADC ( 1) /* Vector: 0x2C IRQ0.0 ADC */ +#define Z16F_IRQ_SPI ( 2) /* Vector: 0x28 IRQ0.1 SPI */ +#define Z16F_IRQ_I2C ( 3) /* Vector: 0x24 IRQ0.2 I2C */ +#define Z16F_IRQ_UART0TX ( 4) /* Vector: 0x20 IRQ0.3 UART0 TX */ +#define Z16F_IRQ_UART0RX ( 5) /* Vector: 0x1C IRQ0.4 UART0 RX */ +#define Z16F_IRQ_TIMER0 ( 6) /* Vector: 0x18 IRQ0.5 Timer 0 */ +#define Z16F_IRQ_TIMER1 ( 7) /* Vector: 0x14 IRQ0.6 Timer 1 */ +#define Z16F_IRQ_TIMER2 ( 8) /* Vector: 0x10 IRQ0.7 Timer 2 */ + +#define Z16F_IRQ_IRQ1 ( 9) /* First of 8 IRQs controlled by IRQ1 registers */ +#define Z16F_IRQ_P0AD ( 9) /* Vector: 0x4C IRQ1.0 Port A/D0, rising/falling edge */ +#define Z16F_IRQ_P1AD (10) /* Vector: 0x48 IRQ1.1 Port A/D1, rising/falling edge */ +#define Z16F_IRQ_P2AD (11) /* Vector: 0x44 IRQ1.2 Port A/D2, rising/falling edge */ +#define Z16F_IRQ_P3AD (12) /* Vector: 0x40 IRQ1.3 Port A/D3, rising/falling edge */ +#define Z16F_IRQ_P4AD (13) /* Vector: 0x3C IRQ1.4 Port A/D4, rising/falling edge */ +#define Z16F_IRQ_P5AD (14) /* Vector: 0x38 IRQ1.5 Port A/D5, rising/falling edge */ +#define Z16F_IRQ_P6AD (15) /* Vector: 0x34 IRQ1.6 Port A/D6, rising/falling edge */ +#define Z16F_IRQ_P7AD (16) /* Vector: 0x30 IRQ1.7 Port A/D7, rising/falling edge */ + +#define Z16F_IRQ_IRQ2 (17) /* First of 8 IRQs controlled by IRQ2 registers */ +#define Z16F_IRQ_C0 (17) /* Vector: IRQ2.0 0x6C Port C0, both edges DMA3 */ +#define Z16F_IRQ_C1 (18) /* Vector: IRQ2.1 0x68 Port C1, both edges DMA3 */ +#define Z16F_IRQ_C2 (19) /* Vector: IRQ2.2 0x64 Port C2, both edges DMA3 */ +#define Z16F_IRQ_C3 (20) /* Vector: IRQ2.3 0x60 Port C3, both edges DMA3 */ +#define Z16F_IRQ_PWMFAULT (21) /* Vector: IRQ2.4 0x5C PWM Fault */ +#define Z16F_IRQ_UART1TX (22) /* Vector: IRQ2.5 0x58 UART1 TX */ +#define Z16F_IRQ_UART1RX (23) /* Vector: IRQ2.6 0x54 UART1 RX */ +#define Z16F_IRQ_PWMTIMER (24) /* Vector: IRQ2.7 0x50 PWM Timer */ #define Z16F_IRQ_SYSTIMER Z16F_IRQ_TIMER0 -#define NR_IRQS (26) +#define NR_IRQS (25) + +/* These macros will map an IRQ to a register bit position */ + +#define Z16F_IRQ0_BIT(i) (1 << ((i)-Z16F_IRQ_IRQ0)) +#define Z16F_IRQ1_BIT(i) (1 << ((i)-Z16F_IRQ_IRQ1)) +#define Z16F_IRQ2_BIT(i) (1 << ((i)-Z16F_IRQ_IRQ2)) /* IRQ Stack Frame Format * |