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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-01 15:36:25 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-10-01 15:36:25 +0000 |
commit | 2bc0bce6ad22eeeb20854ffca236c84efacc2ccb (patch) | |
tree | b9d72efe3f21efffd4bff533cf0f9ba4d777e226 /nuttx/arch | |
parent | be5d79ea646aa6762a4daf26d7ed72cc4479fb42 (diff) | |
download | px4-nuttx-2bc0bce6ad22eeeb20854ffca236c84efacc2ccb.tar.gz px4-nuttx-2bc0bce6ad22eeeb20854ffca236c84efacc2ccb.tar.bz2 px4-nuttx-2bc0bce6ad22eeeb20854ffca236c84efacc2ccb.zip |
Support part/full remap; Fix register addressing
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2112 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_lowputc.c | 80 |
1 files changed, 56 insertions, 24 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_lowputc.c b/nuttx/arch/arm/src/stm32/stm32_lowputc.c index 093c2f6b9..dcaeb559d 100644 --- a/nuttx/arch/arm/src/stm32/stm32_lowputc.c +++ b/nuttx/arch/arm/src/stm32/stm32_lowputc.c @@ -234,12 +234,6 @@ void stm32_lowsetup(void) mapr = getreg32(STM32_AFIO_MAPR); #ifdef CONFIG_STM32_USART1 - /* Enable USART1 clocking */ - - enr = getreg32(STM32_RCC_APB2ENR_OFFSET); - enr |= RCC_APB2ENR_USART1EN; - putreg32(enr, STM32_RCC_APB2ENR_OFFSET); - /* Assume default pin mapping: * * Alternate USART1_REMAP USART1_REMAP @@ -249,20 +243,32 @@ void stm32_lowsetup(void) * USART1_RX PA10 PB7 */ +#ifdef CONFIG_STM32_USART1_REMAP + mapr |= AFIO_MAPR_USART1_REMAP; + putreg32(mapr, STM32_AFIO_MAPR); + + stm32_configgpio(GPIO_USART1_RMTX); + stm32_configgpio(GPIO_USART1_RMRX); +#else + mapr &= ~AFIO_MAPR_USART1_REMAP; + putreg32(mapr, STM32_AFIO_MAPR); + stm32_configgpio(GPIO_USART1_TX); stm32_configgpio(GPIO_USART1_RX); - mapr &= ~AFIO_MAPR_USART1_REMAP; +#endif + + /* Enable USART1 clocking */ + + enr = getreg32(STM32_RCC_APB2ENR); + enr |= RCC_APB2ENR_USART1EN; + putreg32(enr, STM32_RCC_APB2ENR); #endif /* CONFIG_STM32_USART1 */ #if defined(CONFIG_STM32_USART2) || defined(CONFIG_STM32_USART3) - enr = getreg32(STM32_RCC_APB1ENR_OFFSET); + enr = getreg32(STM32_RCC_APB1ENR); #ifdef CONFIG_STM32_USART2 - /* Enable USART2 clocking */ - - enr |= RCC_APB1ENR_USART2EN; - /* Assume default pin mapping: * * Alternate USART2_REMAP USART2_REMAP @@ -275,17 +281,28 @@ void stm32_lowsetup(void) * USART3_CK PA4 PD7 */ +#ifdef CONFIG_STM32_USART2_REMAP + mapr |= ~AFIO_MAPR_USART2_REMAP; + putreg32(mapr, STM32_AFIO_MAPR); + + stm32_configgpio(GPIO_USART2_RMTX); + stm32_configgpio(GPIO_USART2_RMRX); +#else + mapr &= ~AFIO_MAPR_USART2_REMAP; + putreg32(mapr, STM32_AFIO_MAPR); + stm32_configgpio(GPIO_USART2_TX); stm32_configgpio(GPIO_USART2_RX); - mapr &= ~AFIO_MAPR_USART2_REMAP; +#endif -#endif /* CONFIG_STM32_USART2 */ + /* Enable USART2 clocking */ -#ifdef CONFIG_STM32_USART3 - /* Enable USART3 clocking */ + enr |= RCC_APB1ENR_USART2EN; + putreg32(enr, STM32_RCC_APB1ENR); - enr |= RCC_APB1ENR_USART3EN; +#endif /* CONFIG_STM32_USART2 */ +#ifdef CONFIG_STM32_USART3 /* Assume default pin mapping: * * Alternate USART3_REMAP[1:0] USART3_REMAP[1:0] USART3_REMAP[1:0] @@ -298,18 +315,33 @@ void stm32_lowsetup(void) * USART3_RTS PB14 PB14 PD12 */ + mapr &= ~AFIO_MAPR_USART3_REMAP_MASK; +#if defined(CONFIG_STM32_USART2_PARTIAL_REMAP) + mapr |= AFIO_MAPR_USART3_PARTREMAP; + putreg32(mapr, STM32_AFIO_MAPR); + + stm32_configgpio(GPIO_USART3_PRMTX); + stm32_configgpio(GPIO_USART3_PRMRX); +#elif defined(CONFIG_STM32_USART2_FULL_REMAP) + mapr |= AFIO_MAPR_USART3_FULLREMAP; + putreg32(mapr, STM32_AFIO_MAPR); + + stm32_configgpio(GPIO_USART3_FRMTX); + stm32_configgpio(GPIO_USART3_FRMRX); +#else + putreg32(mapr, STM32_AFIO_MAPR); + stm32_configgpio(GPIO_USART3_TX); stm32_configgpio(GPIO_USART3_RX); - mapr &= ~AFIO_MAPR_USART3_REMAP_MASK; +#endif -#endif /* CONFIG_STM32_USART3 */ - /* Save the UART enable settings */ + /* Enable USART3 clocking */ - putreg32(enr, STM32_RCC_APB1ENR_OFFSET); -#endif /* CONFIG_STM32_USART2 || CONFIG_STM32_USART3 */ - /* Save the USART pin mappings */ + enr |= RCC_APB1ENR_USART3EN; + putreg32(enr, STM32_RCC_APB1ENR); - putreg32(mapr, STM32_AFIO_MAPR); +#endif /* CONFIG_STM32_USART3 */ +#endif /* CONFIG_STM32_USART2 || CONFIG_STM32_USART3 */ /* Enable and configure the selected console device */ |