summaryrefslogtreecommitdiff
path: root/nuttx/arch
diff options
context:
space:
mode:
authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2009-04-13 23:24:37 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2009-04-13 23:24:37 +0000
commit36052c9b70ae9fb8ad6e4f6c91094c26f749cf68 (patch)
tree0ba336d5cb6e794a9bd7681c730be42e4c8e1d32 /nuttx/arch
parent54f0d37c7c740dbe7e05e6307bb5049ba6ce087d (diff)
downloadpx4-nuttx-36052c9b70ae9fb8ad6e4f6c91094c26f749cf68.tar.gz
px4-nuttx-36052c9b70ae9fb8ad6e4f6c91094c26f749cf68.tar.bz2
px4-nuttx-36052c9b70ae9fb8ad6e4f6c91094c26f749cf68.zip
Add interrupt decode logic for i.MX
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1701 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
-rw-r--r--nuttx/arch/arm/src/dm320/dm320_decodeirq.c10
-rw-r--r--nuttx/arch/arm/src/imx/Make.defs2
-rw-r--r--nuttx/arch/arm/src/imx/imx_aitc.h6
-rw-r--r--nuttx/arch/arm/src/imx/imx_decodeirq.c123
4 files changed, 136 insertions, 5 deletions
diff --git a/nuttx/arch/arm/src/dm320/dm320_decodeirq.c b/nuttx/arch/arm/src/dm320/dm320_decodeirq.c
index fad9f0faf..1b5ac401f 100644
--- a/nuttx/arch/arm/src/dm320/dm320_decodeirq.c
+++ b/nuttx/arch/arm/src/dm320/dm320_decodeirq.c
@@ -1,7 +1,8 @@
/********************************************************************************
- * dm320/dm320_decodeirq.c
+ * arch/arm/src/dm320/dm320_decodeirq.c
+ * arch/arm/src/chip/dm320_decodeirq.c
*
- * Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -14,7 +15,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
- * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
@@ -43,6 +44,7 @@
#include <nuttx/arch.h>
#include <assert.h>
#include <debug.h>
+
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@@ -86,7 +88,7 @@ void up_decodeirq(uint32* regs)
int irq = (irqentry >> 2) - 1;
- /* Verify that the resulting IRQ number is valie */
+ /* Verify that the resulting IRQ number is valid */
if ((unsigned)irq < NR_IRQS)
{
diff --git a/nuttx/arch/arm/src/imx/Make.defs b/nuttx/arch/arm/src/imx/Make.defs
index 60250c473..b7019260c 100644
--- a/nuttx/arch/arm/src/imx/Make.defs
+++ b/nuttx/arch/arm/src/imx/Make.defs
@@ -47,7 +47,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
CHIP_ASRCS = imx_lowputc.S
CHIP_CSRCS = imx_boot.c imx_gpio.c imx_allocateheap.c imx_irq.c \
- imx_serial.c imx_timerisr.c # imx_decodeirq.c imx_framebuffer.c
+ imx_serial.c imx_timerisr.c imx_decodeirq.c #imx_framebuffer.c
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += imx_usbdev.c
diff --git a/nuttx/arch/arm/src/imx/imx_aitc.h b/nuttx/arch/arm/src/imx/imx_aitc.h
index b73e70fa9..fdd8a5cf3 100644
--- a/nuttx/arch/arm/src/imx/imx_aitc.h
+++ b/nuttx/arch/arm/src/imx/imx_aitc.h
@@ -106,6 +106,12 @@
/* AITC Register Bit Definitions ****************************************************/
+
+#define AITC_NIVECSR_NIPRILVL_SHIFT 0 /* Bits 15–0: Priority of highest priority interrupt */
+#define AITC_NIVECSR_NIPRILVL_MASK (0x0000ffff << AITC_NIVECSR_NIPRILVL_SHIFT);
+#define AITC_NIVECSR_NIVECTOR_SHIFT 16 /* Bits 31–16: Vector index of highest priority interrupt */
+#define AITC_NIVECSR_NIVECTOR_MASK (0x0000ffff << AITC_NIVECSR_NIVECTOR_SHIFT);
+
/************************************************************************************
* Inline Functions
************************************************************************************/
diff --git a/nuttx/arch/arm/src/imx/imx_decodeirq.c b/nuttx/arch/arm/src/imx/imx_decodeirq.c
new file mode 100644
index 000000000..f6a38b934
--- /dev/null
+++ b/nuttx/arch/arm/src/imx/imx_decodeirq.c
@@ -0,0 +1,123 @@
+/********************************************************************************
+ * arch/arm/src/imx/imx_decodeirq.c
+ * arch/arm/src/chip/imx_decodeirq.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ ********************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <assert.h>
+#include <debug.h>
+
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+/********************************************************************************
+ * Definitions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Functions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Funtions
+ ********************************************************************************/
+
+void up_decodeirq(uint32* regs)
+{
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+ lib_lowprintf("Unexpected IRQ\n");
+ current_regs = regs;
+ PANIC(OSERR_ERREXCEPTION);
+#else
+ uint32 regval;
+ int irq;
+
+ /* Decode the interrupt. First, fetch the NIVECSR register. */
+
+ regval = getreg32(IMX_AITC_NIVECSR);
+
+ /* The MS 16 bits of the NIVECSR register contains vector index for the
+ * highest pending normal interrupt.
+ */
+
+ irq = regval >> AITC_NIVECSR_NIVECTOR_SHIFT;
+
+ /* If irq < 64, then this is the IRQ. If there is no pending interrupt,
+ * then irq will be >= 64 (it will be 0xffff for illegal source).
+ */
+
+ if (irq < NR_IRQS)
+ {
+ /* Mask and acknowledge the interrupt */
+
+ up_maskack_irq(irq);
+
+ /* Current regs non-zero indicates that we are processing an interrupt;
+ * current_regs is also used to manage interrupt level context switches.
+ */
+
+ current_regs = regs;
+
+ /* Deliver the IRQ */
+
+ irq_dispatch(irq, regs);
+
+ /* Indicate that we are no long in an interrupt handler */
+
+ current_regs = NULL;
+
+ /* Unmask the last interrupt (global interrupts are still
+ * disabled.
+ */
+
+ up_enable_irq(irq);
+ }
+#endif
+}