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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-01-19 02:00:14 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2010-01-19 02:00:14 +0000
commit3de104fec53509a9a5a3475e63591c627cce094b (patch)
treedd7ecdf809baa0417695985aa32159537e28830d /nuttx/arch
parentccc33eb4d31331212de451f701e6d69c0f40ffbf (diff)
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Add beginning of SAM3U GPIO config logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2512 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
-rwxr-xr-xnuttx/arch/arm/src/sam3u/sam3u_internal.h129
-rwxr-xr-xnuttx/arch/arm/src/sam3u/sam3u_pio.h2
2 files changed, 129 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_internal.h b/nuttx/arch/arm/src/sam3u/sam3u_internal.h
index 3eace01ce..b6fa996ba 100755
--- a/nuttx/arch/arm/src/sam3u/sam3u_internal.h
+++ b/nuttx/arch/arm/src/sam3u/sam3u_internal.h
@@ -55,7 +55,90 @@
/* Configuration ********************************************************************/
-/* NVIC priority levels *************************************************************/
+/* Bit-encoded input to sam3u_configgpio() ******************************************/
+
+/* 16-bit Encoding:
+ * MMCC C... VPPB BBBB
+ */
+
+/* Input/Output mode:
+ *
+ * MM.. .... .... ....
+ */
+
+#define GPIO_CFG_SHIFT (14) /* Bits 14-15: GPIO mode */
+#define GPIO_CFG_MASK (3 << GPIO_CNF_SHIFT)
+# define GPIO_INPUT (0 << GPIO_CNF_SHIFT) /* Input */
+# define GPIO_OUTPUT (1 << GPIO_CNF_SHIFT) /* Output */
+# define GPIO_PERIPHA (2 << GPIO_CNF_SHIFT) /* Controlled by periph A signal */
+# define GPIO_PERIPHB (3 << GPIO_CNF_SHIFT) /* Controlled by periph B signal */
+
+/* These bits set the configuration of the pin:
+ * ..CC C... .... ....
+ */
+
+#define GPIO_CFG_SHIFT (11) /* Bits 11-13: GPIO configuration bits */
+#define GPIO_CFG_MASK (3 << GPIO_CNF_SHIFT)
+# define GPIO_CFG_DEFAULT (0 << GPIO_CNF_SHIFT) /* Default, no attribute */
+# define GPIO_CFG_PULLUP (1 << GPIO_CNF_SHIFT) /* Bit 11: Internal pull-up */
+# define GPIO_CFG_DEGLITCH (2 << GPIO_CNF_SHIFT) /* Bit 12: Internal glitch filter */
+# define GPIO_CFG_OPENDRAIN (4 << GPIO_CNF_SHIFT) /* Bit 13: Open drain */
+
+/* If the pin is an GPIO output, then this identifies the initial output value:
+ * .... .... V... ....
+ */
+
+#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Inital value of output */
+#define GPIO_OUTPUT_CLEAR (0)
+
+/* This identifies the GPIO port:
+ * .... .... .PP. ....
+ */
+
+#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
+#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT)
+# define GPIO_PORT_PIOA (0 << GPIO_CNF_SHIFT)
+# define GPIO_PORT_PIOB (1 << GPIO_CNF_SHIFT)
+# define GPIO_PORT_PIOC (2 << GPIO_CNF_SHIFT)
+
+/* This identifies the bit in the port:
+ * .... .... ...B BBBB
+ */
+
+#define GPIO_PIN_SHIFT 0 /* Bits 0-3: GPIO number: 0-15 */
+#define GPIO_PIN_MASK (15 << GPIO_PIN_SHIFT)
+#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
+#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
+#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
+#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
+#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
+#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
+#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
+#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
+#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
+#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
+#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
+#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
+#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
+#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
+#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
+#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
+#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
+#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
+#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
+#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
+#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
+#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
+#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
+#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
+#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
+#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
+#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
+#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
+#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
+#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
+#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
+#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
/************************************************************************************
* Public Types
@@ -110,6 +193,50 @@ EXTERN void sam3u_clockconfig(void);
EXTERN void sam3u_lowsetup(void);
+/************************************************************************************
+ * Name: sam3u_configgpio
+ *
+ * Description:
+ * Configure a GPIO pin based on bit-encoded description of the pin.
+ *
+ ************************************************************************************/
+
+EXTERN int sam3u_configgpio(uint16_t cfgset);
+
+/************************************************************************************
+ * Name: sam3u_gpiowrite
+ *
+ * Description:
+ * Write one or zero to the selected GPIO pin
+ *
+ ************************************************************************************/
+
+EXTERN void sam3u_gpiowrite(uint16_t pinset, bool value);
+
+/************************************************************************************
+ * Name: sam3u_gpioread
+ *
+ * Description:
+ * Read one or zero from the selected GPIO pin
+ *
+ ************************************************************************************/
+
+EXTERN bool sam3u_gpioread(uint16_t pinset);
+
+/************************************************************************************
+ * Function: sam3u_dumpgpio
+ *
+ * Description:
+ * Dump all GPIO registers associated with the port of the provided pin description.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_DEBUG
+EXTERN int sam3u_dumpgpio(uint16_t pinset, const char *msg);
+#else
+# define sam3u_dumpgpio(p,m)
+#endif
+
#undef EXTERN
#if defined(__cplusplus)
}
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_pio.h b/nuttx/arch/arm/src/sam3u/sam3u_pio.h
index 887bdc1d7..165b2e663 100755
--- a/nuttx/arch/arm/src/sam3u/sam3u_pio.h
+++ b/nuttx/arch/arm/src/sam3u/sam3u_pio.h
@@ -112,7 +112,7 @@
#define PIOA (0)
#define PIOB (1)
-#define PIOB (2)
+#define PIOC (2)
#define SAM3U_PIO_PER(n) (SAM3U_PIO_BASE(n)+SAM3U_PIO_PER_OFFSET)
#define SAM3U_PIO_PDR(n) (SAM3U_PIO_BASE(n)+SAM3U_PIO_PDR_OFFSET)