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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-10-31 01:10:24 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-10-31 01:10:24 +0000 |
| commit | 5e22aa583909d282dd67883a435500ae3c7a5953 (patch) | |
| tree | 475cf211e6801c968ce1ff1cbc697f13ea68e2b1 /nuttx/arch | |
| parent | 8f487d35c10519ea6f4ab7a96750daa953453c53 (diff) | |
| download | px4-nuttx-5e22aa583909d282dd67883a435500ae3c7a5953.tar.gz px4-nuttx-5e22aa583909d282dd67883a435500ae3c7a5953.tar.bz2 px4-nuttx-5e22aa583909d282dd67883a435500ae3c7a5953.zip | |
Debug typo fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3063 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
| -rw-r--r-- | nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c | 8 | ||||
| -rw-r--r-- | nuttx/arch/avr/src/at32uc3/at32uc3_pm.h | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c b/nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c index 8dc1ae4f1..851d66273 100644 --- a/nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c +++ b/nuttx/arch/avr/src/at32uc3/at32uc3_clkinit.c @@ -108,8 +108,8 @@ static inline void up_enableosc32(void) /* Enable the 32-kHz clock */ regval = getreg32(AVR32_PM_OSCCTRL32); - regval &= ~PM_OSCCTRL_STARTUP_MASK; - regval |= PM_OSCCTRL32_EN|(AVR32_OSC32STARTUP << PM_OSCCTRL_STARTUP_SHIFT); + regval &= ~PM_OSCCTRL32_STARTUP_MASK; + regval |= PM_OSCCTRL32_EN|(AVR32_OSC32STARTUP << PM_OSCCTRL32_STARTUP_SHIFT); putreg32(regval, AVR32_PM_OSCCTRL32); } @@ -220,7 +220,7 @@ static inline void up_enableosc1(void) **************************************************************************/ #ifdef AVR32_CLOCK_PLL0 -static inline void up_enableosc1(void) +static inline void up_enablepll0(void) { /* Setup PLL0 */ @@ -270,7 +270,7 @@ static inline void up_enableosc1(void) **************************************************************************/ #ifdef AVR32_CLOCK_PLL1 -static inline void up_enableosc1(void) +static inline void up_enablepll1(void) { /* Setup PLL1 */ diff --git a/nuttx/arch/avr/src/at32uc3/at32uc3_pm.h b/nuttx/arch/avr/src/at32uc3/at32uc3_pm.h index 786cf1d68..365876877 100644 --- a/nuttx/arch/avr/src/at32uc3/at32uc3_pm.h +++ b/nuttx/arch/avr/src/at32uc3/at32uc3_pm.h @@ -208,7 +208,7 @@ #define PM_OSCCTRL32_MODE_MASK (7 << PM_OSCCTRL32_MODE_SHIFT) # define PM_OSCCTRL32_MODE_EXT (0 << PM_OSCCTRL32_MODE_SHIFT) /* External clock */ # define PM_OSCCTRL32_MODE_XTAL (1 << PM_OSCCTRL32_MODE_SHIFT) /* Crystal */ -#define PM_OSCCTRL32_STARTUPSHIFT (16) /* Bits 16-18: Oscillator Startup Time */ +#define PM_OSCCTRL32_STARTUP_SHIFT (16) /* Bits 16-18: Oscillator Startup Time */ #define PM_OSCCTRL32_STARTUP_MASK (7 << PM_OSCCTRL32_STARTUP_SHIFT) # define PM_OSCCTRL32_STARTUP_0 (0 << PM_OSCCTRL32_STARTUP_SHIFT) /* Num RCOsc cycles */ # define PM_OSCCTRL32_STARTUP_128 (1 << PM_OSCCTRL32_STARTUP_SHIFT) /* " " " " " " */ |