Flash layout, bootloader, paging fixes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2321 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 55 insertions, 19 deletions

diff --git a/nuttx/configs/demo9s12ne64/ostest/ld.script b/nuttx/configs/demo9s12ne64/ostest/ld.script
index 4c7c6ed32..caf3ea449 100755
--- a/nuttx/configs/demo9s12ne64/ostest/ld.script
+++ b/nuttx/configs/demo9s12ne64/ostest/ld.script
@@ -34,16 +34,57 @@
  ****************************************************************************/
 
 /* The DEMO9S12NE64 has 64Kb of FLASH and 8Kb of SRAM that are assumed to be
- * positioned as below:
+ * paged and positioned as below:
  */
 
 MEMORY
 {
-    flash (rx) : ORIGIN = 0x0800, LENGTH = 64K
-    sram (rwx) : ORIGIN = 0x3800, LENGTH = 8K
+  /* The 8Kb SRAM is mapped to 0x2000-0x2fff.  The top 256 bytes are reserved
+   * for the serial monitor stack space.
+   */
+
+  sram   (rwx)  : ORIGIN = 0x2000, LENGTH = 8K-256
+
+  /* Two fixed text flash pages (corresponding to page 3e and 3f */
+
+  lowtext(rx)   : ORIGIN = 0x4000, LENGTH = 16K			/* Page 3e */
+  hitext (rx)   : ORIGIN = 0xc000, LENGTH = 16K-2k		/* Page 3f */
+
+  /* Flash memory pages:
+   *
+   * The MC9S12NE64 implements 6 bits of the PPAGE register which gives it a
+   * 1 Mbyte program memory address space that is accessed through the PPAGE
+   * window. The lower 768K portion (0x000000-0x0bffff) of the address space
+   * is accessed with PPAGE values 0x00 through 0x2f.  This address range
+   * is reserved for external memory when the part is operated in expanded
+   * mode. The upper 256K of the address space (0x0c0000-0x100000), accessed
+   * with PPAGE values 0x30 through 0x3f, is occupied by on chip flash.
+   */
+
+  page30 (rx)   : ORIGIN = 0x0c0000, LENGTH = 16K		/* Page 30 */
+  page31 (rx)   : ORIGIN = 0x0c4000, LENGTH = 16K		/* Page 31 */
+  page32 (rx)   : ORIGIN = 0x0c8000, LENGTH = 16K		/* Page 32 */
+  page33 (rx)   : ORIGIN = 0x0cc000, LENGTH = 16K		/* Page 33 */
+  page34 (rx)   : ORIGIN = 0x0d0000, LENGTH = 16K		/* Page 34 */
+  page35 (rx)   : ORIGIN = 0x0d4000, LENGTH = 16K		/* Page 35 */
+  page36 (rx)   : ORIGIN = 0x0d8000, LENGTH = 16K		/* Page 36 */
+  page37 (rx)   : ORIGIN = 0x0dc000, LENGTH = 16K		/* Page 37 */
+  page38 (rx)   : ORIGIN = 0x0e0000, LENGTH = 16K		/* Page 38 */
+  page39 (rx)   : ORIGIN = 0x0e4000, LENGTH = 16K		/* Page 39 */
+  page3a (rx)   : ORIGIN = 0x0e8000, LENGTH = 16K		/* Page 3a */
+  page3b (rx)   : ORIGIN = 0x0ec000, LENGTH = 16K		/* Page 3b */
+  page3c (rx)   : ORIGIN = 0x0f0000, LENGTH = 16K		/* Page 3c */
+  page3d (rx)   : ORIGIN = 0x0f4000, LENGTH = 16K		/* Page 3d */
+
+  page3e (rx)   : ORIGIN = 0x0f8000, LENGTH = 16K		/* Page 3e */
+  page3f (rx)   : ORIGIN = 0x0fc000, LENGTH = 16K-2K	/* Page 3f */
+
+  /* Vectors.  These get relocated to 0xf780-f7ff by the serial loader */
+
+  vectors (rx)  : ORIGIN = 0xff80,   LENGTH = 256
 }
 
-OUTPUT_ARCH(m68hcs12)
+OUTPUT_ARCH(m68hc12)
 ENTRY(_stext)
 SECTIONS
 {
@@ -61,29 +102,17 @@ SECTIONS
 		*(.gcc_except_table)
 		*(.gnu.linkonce.r.*)
 		_etext = ABSOLUTE(.);
-	} > flash
+	} > hitext
 
 	_eronly = ABSOLUTE(.);		/* See below                    */
 
-	/* The DEMO9S12NE64 has 64Kb of SRAM beginning at the following address */
-
 	.data : {
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
 		CONSTRUCTORS
 		_edata = ABSOLUTE(.);
-	} > sram AT > flash
-
-	.ARM.extab : {
-		*(.ARM.extab*)
-	} >sram
-
-	.ARM.exidx : {
-		__exidx_start = ABSOLUTE(.);
-		*(.ARM.exidx*)
-		__exidx_end = ABSOLUTE(.);
-	} >sram
+	} > sram AT > lowtext
 
 	.bss : {			/* BSS				*/
 		_sbss = ABSOLUTE(.);
@@ -92,7 +121,14 @@ SECTIONS
 		*(COMMON)
 		_ebss = ABSOLUTE(.);
 	} > sram
-					/* Stabs debugging sections.	*/
+
+	.vectors : {
+		_svectors = ABSOLUTE(.);
+		*(.vectors)
+		_evectors = ABSOLUTE(.);
+	} > vectors
+
+	/* Stabs debugging sections.	*/
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }