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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-13 16:11:26 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-08-13 16:11:26 +0000 |
commit | afd96ea0af98714eba7b76edb58be5f27cf20b44 (patch) | |
tree | 32e19b3a42d7169b396651bb35037b6aa0c73b5b /nuttx/configs/kwikstik-k40/include/board.h | |
parent | d212c46891d73fec2a1bbc4069d5fecfc360b8f1 (diff) | |
download | px4-nuttx-afd96ea0af98714eba7b76edb58be5f27cf20b44.tar.gz px4-nuttx-afd96ea0af98714eba7b76edb58be5f27cf20b44.tar.bz2 px4-nuttx-afd96ea0af98714eba7b76edb58be5f27cf20b44.zip |
Add Kinetis clocking logic and some UART logic. Add K60 Tower configuration
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3876 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/kwikstik-k40/include/board.h')
-rwxr-xr-x | nuttx/configs/kwikstik-k40/include/board.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/nuttx/configs/kwikstik-k40/include/board.h b/nuttx/configs/kwikstik-k40/include/board.h index be47b9ebf..85f2afeb5 100755 --- a/nuttx/configs/kwikstik-k40/include/board.h +++ b/nuttx/configs/kwikstik-k40/include/board.h @@ -51,6 +51,38 @@ ************************************************************************************/ /* Clocking *************************************************************************/ +/* The Kwikstik-K40 has a 4MHz crystal on board */ + +#undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_EXTAL_FREQ 4000000 /* 4MHz crystal frequency (REFCLK) */ +#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */ + +/* PLL Configuration. NOTE: Only even frequency crystals are supported that will + * produce a 2MHz reference clock to the PLL. + * + * PLL Input frequency: PLLIN = REFCLK/PRDIV = 4MHz/2 = 2MHz + * PLL Output frequency: PLLOUT = PLLIN*VDIV = 2Mhz*48 = 96MHz + * MCG Frequency: PLLOUT = 96MHz + */ + +#define BOARD_PRDIV 2 /* PLL External Reference Divider */ +#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */ + +#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV) +#define BOARD_PLLOUT_FREQ (BOARD_EXTAL_FREQ * BOARD_VDIV) +#define BOARD_MCG_FREQ BOARD_PLL_FREQ + +/* SIM CLKDIV1 dividers */ + +#define BOARD_OUTDIV1 1 /* Core = MCG, 96MHz */ +#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 48MHz */ +#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 48MHz */ +#define BOARD_OUTDIV4 4 /* Flash clock = MCG/4, 24MHz */ + +#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1) +#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2) +#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3) +#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4) /* LED definitions ******************************************************************/ |