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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2008-11-02 22:34:35 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2008-11-02 22:34:35 +0000
commite593ab4c83a79e62a3aab0cc6b1036a1673e25cf (patch)
tree08c5c01ff0e98d2c68c6d7f44129a5e6edbcc0b9 /nuttx/configs/mcu123-lpc214x/src
parent3cff5bf200e63ced6101e2c011db5f28d8360d09 (diff)
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Fix workaround logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1124 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/mcu123-lpc214x/src')
-rw-r--r--nuttx/configs/mcu123-lpc214x/src/up_spi.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/nuttx/configs/mcu123-lpc214x/src/up_spi.c b/nuttx/configs/mcu123-lpc214x/src/up_spi.c
index 9e201a5a0..0997aa01b 100644
--- a/nuttx/configs/mcu123-lpc214x/src/up_spi.c
+++ b/nuttx/configs/mcu123-lpc214x/src/up_spi.c
@@ -154,11 +154,16 @@ static void spi_select(FAR struct spi_dev_s *dev, boolean selected)
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_TNF));
putreg16(0xff, LPC214X_SPI1_DR);
- /* Then wait until TX FIFO and TX shift buffer are empty */
+ /* Wait until TX FIFO and TX shift buffer are empty */
while (getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_BSY);
+
+ /* Wait until RX FIFO is not empty */
+
while (!(getreg8(LPC214X_SPI1_SR) & LPC214X_SPI1SR_RNE));
+ /* Then read and discard bytes until the RX FIFO is empty */
+
do
{
(void)getreg16(LPC214X_SPI1_DR);
@@ -290,7 +295,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const ubyte *buffer, siz
}
}
- /* Then discard all card responses until the TX FIFO is emptied. */
+ /* Then discard all card responses until the RX & TX FIFOs are emptied. */
do
{
@@ -304,12 +309,13 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const ubyte *buffer, siz
(void)getreg16(LPC214X_SPI1_DR);
}
- /* There is a race condition where TFE may go FALSE just before
- * RNE goes true. The nasty little delay in the following solves
- * that (it could probably be tuned to improve performance).
+ /* There is a race condition where TFE may go TRUE just before
+ * RNE goes true and this loop terminates prematurely. The nasty little
+ * delay in the following solves that (it could probably be tuned
+ * to improve performance).
*/
- else if ((sr & LPC214X_SPI1SR_TFE) == 0)
+ else if ((sr & LPC214X_SPI1SR_TFE) != 0)
{
up_udelay(100);
sr = getreg8(LPC214X_SPI1_SR);