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authorGregory Nutt <gnutt@nuttx.org>2014-06-03 10:34:36 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-06-03 10:34:36 -0600
commit3ab15dfd8e3a78efc0ae6850bac443a83e81c9c0 (patch)
treeda600ba6bdfc2ccd78e97b310bbcf10557b08dcc /nuttx/configs/olimex-stm32-h405/include
parent97e75d237a63de0a073af04c4bac4397233dbe62 (diff)
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Add support for the Olimex STM32 h405. From Martin Lederhilger
Diffstat (limited to 'nuttx/configs/olimex-stm32-h405/include')
-rw-r--r--nuttx/configs/olimex-stm32-h405/include/board.h235
1 files changed, 235 insertions, 0 deletions
diff --git a/nuttx/configs/olimex-stm32-h405/include/board.h b/nuttx/configs/olimex-stm32-h405/include/board.h
new file mode 100644
index 000000000..260fc3dae
--- /dev/null
+++ b/nuttx/configs/olimex-stm32-h405/include/board.h
@@ -0,0 +1,235 @@
+/************************************************************************************
+ * configs/olimex-stm32-h405/include/board.h
+ *
+ * Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H
+#define __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H 1
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+#include "stm32_rcc.h"
+#include "stm32.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC (30-60KHz, uncalibrated)
+ * HSE - On-board crystal frequency is 8MHz
+ * LSE - 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL 8000000ul
+
+#define STM32_HSI_FREQUENCY 16000000ul
+#define STM32_LSI_FREQUENCY 32000
+#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY 32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * = (25,000,000 / 12) * 360
+ * = 240,000,000
+ * SYSCLK = PLL_VCO / PLLP
+ * = 240,000,000 / 2 = 120,000,000
+ * USB OTG FS, SDIO and RNG Clock
+ * = PLL_VCO / PLLQ
+ * = 240,000,000 / 5 = 48,000,000
+ * = 48,000,000
+ */
+
+#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(12)
+#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(360)
+#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5)
+
+#define STM32_SYSCLK_FREQUENCY 120000000ul
+
+/* AHB clock (HCLK) is SYSCLK (120MHz) */
+
+#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */
+
+#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 (60Mhz)*/
+
+#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */
+
+#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 (120Mhz)*/
+
+#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY
+#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY
+
+/* LED definitions ******************************************************************/
+/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
+ * way. The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with stm32_setled() */
+
+#define BOARD_LED_STATUS 0
+#define BOARD_NLEDS 1
+
+/* LED bits for use with stm32_setleds() */
+
+#define BOARD_LED_STATUS_BIT (1 << BOARD_LED1)
+
+/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
+ * Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs:
+ */
+
+#define LED_STARTED 0 /* LED_STATUS on */
+#define LED_HEAPALLOCATE 1 /* no change */
+#define LED_IRQSENABLED 2 /* no change */
+#define LED_STACKCREATED 3 /* no change */
+#define LED_INIRQ 4 /* no change */
+#define LED_SIGNAL 5 /* no change */
+#define LED_ASSERTION 6 /* LED_STATUS off */
+#define LED_PANIC 7 /* LED_STATUS blinking */
+
+/* Button definitions ***************************************************************/
+/* The Olimex STM32-H405 supports one buttons: */
+
+#define BUTTON_BUT 0
+#define NUM_BUTTONS 1
+
+#define BUTTON_BUT_BIT (1 << BUTTON_BUT)
+
+/* Alternate function pin selections ************************************************/
+
+//USART3:
+#define GPIO_USART3_RX GPIO_USART3_RX_1 //PB11
+#define GPIO_USART3_TX GPIO_USART3_TX_1 //PB10
+#define GPIO_USART3_CTS GPIO_USART3_CTS_1 //PB13
+#define GPIO_USART3_RTS GPIO_USART3_RTS_1 //PB14
+
+//CAN:
+#define GPIO_CAN1_RX GPIO_CAN1_RX_2 //PB8
+#define GPIO_CAN1_TX GPIO_CAN1_TX_2 //PB9
+#define GPIO_CAN2_RX GPIO_CAN1_RX_2 //PB5
+#define GPIO_CAN2_TX GPIO_CAN1_TX_2 //PB6
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_ledinit, stm32_setled, and stm32_setleds
+ *
+ * Description:
+ * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board LEDs. If
+ * CONFIG_ARCH_LEDS is not defined, then the following interfaces are available to
+ * control the LEDs from user applications.
+ *
+ ************************************************************************************/
+
+#ifndef CONFIG_ARCH_LEDS
+void stm32_ledinit(void);
+void stm32_setled(int led, bool ledon);
+void stm32_setleds(uint8_t ledset);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_OLIMEX_STM32_H405_INCLUDE_BOARD_H */