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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-09-22 15:12:50 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-09-22 15:12:50 +0000 |
| commit | 273a2b0d87cc6bde28cbae477afc313f017b4d3a (patch) | |
| tree | 1a9237dab9454102679fad0b6b1570ee271f4986 /nuttx/configs/olimex-stm32-p107/include | |
| parent | b3da63f487b2ccc69afd9610e0a6082d8482df56 (diff) | |
| download | px4-nuttx-273a2b0d87cc6bde28cbae477afc313f017b4d3a.tar.gz px4-nuttx-273a2b0d87cc6bde28cbae477afc313f017b4d3a.tar.bz2 px4-nuttx-273a2b0d87cc6bde28cbae477afc313f017b4d3a.zip | |
Make the Olimex stm32 p107 clock configuratin the standard for connectivity line devices
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5175 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/olimex-stm32-p107/include')
| -rw-r--r-- | nuttx/configs/olimex-stm32-p107/include/board.h | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/nuttx/configs/olimex-stm32-p107/include/board.h b/nuttx/configs/olimex-stm32-p107/include/board.h index 2fe6e5aaf..d531eb112 100644 --- a/nuttx/configs/olimex-stm32-p107/include/board.h +++ b/nuttx/configs/olimex-stm32-p107/include/board.h @@ -57,9 +57,18 @@ /* On-board crystal frequency is 25MHz (HSE) */ #define STM32_BOARD_XTAL 25000000ul + +/* PLL ouput is 72MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */ +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */ +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */ +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */ #define STM32_PLL_FREQUENCY (72000000) -#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +/* SYCLLK and HCLK are the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ @@ -88,6 +97,12 @@ #define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +/* MCO output */ + +#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO) +# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 +#endif + /************************************************************************************ * Public Function Prototypes ************************************************************************************/ @@ -102,16 +117,3 @@ ************************************************************************************/ void stm32_boardinitialize(void); - -/************************************************************************************ - * Name: stm32_board_clockconfig - * - * Description: - * Any STM32 board may replace the "standard" board clock configuration logic with - * its own, custom clock cofiguration logic. - * - ************************************************************************************/ - -#ifdef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG -void stm32_board_clockconfig(void); -#endif |