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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-01-17 17:55:13 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-01-17 17:55:13 +0000 |
commit | ccc33eb4d31331212de451f701e6d69c0f40ffbf (patch) | |
tree | 88fe149d8a2ff7b3a6ea8ec503ec8a972df73a59 /nuttx/configs/sam3u-ek | |
parent | f30315549b0ab370f4461426ccd7508bfb14d41a (diff) | |
download | px4-nuttx-ccc33eb4d31331212de451f701e6d69c0f40ffbf.tar.gz px4-nuttx-ccc33eb4d31331212de451f701e6d69c0f40ffbf.tar.bz2 px4-nuttx-ccc33eb4d31331212de451f701e6d69c0f40ffbf.zip |
Add SAM3U clock and systick init logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2511 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/sam3u-ek')
-rwxr-xr-x | nuttx/configs/sam3u-ek/include/board.h | 45 | ||||
-rwxr-xr-x | nuttx/configs/sam3u-ek/ostest/defconfig | 14 |
2 files changed, 44 insertions, 15 deletions
diff --git a/nuttx/configs/sam3u-ek/include/board.h b/nuttx/configs/sam3u-ek/include/board.h index 83fbdbd8f..4dd4de11d 100755 --- a/nuttx/configs/sam3u-ek/include/board.h +++ b/nuttx/configs/sam3u-ek/include/board.h @@ -53,17 +53,46 @@ ************************************************************************************/ /* Clocking *************************************************************************/ +/* After power-on reset, the sam3u device is running on a 4MHz internal RC. These + * definitions will configure clocking with MCK = 48MHz, PLLA = 96, and CPU=48MHz. + */ + +/* Main oscillator register settings */ + +#define BOARD_CKGR_MOR_MOSCXTST (63 << CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ + +/* PLLA configuration */ + +#define BOARD_CKGR_PLLAR_MULA (7 << CKGR_PLLAR_MULA_SHIFT) +#define BOARD_CKGR_PLLAR_STMODE CKGR_PLLAR_STMODE_FAST +#define BOARD_CKGR_PLLAR_PLLACOUNT (63 << CKGR_PLLAR_PLLACOUNT_SHIFT) +#define BOARD_CKGR_PLLAR_DIVA CKGR_PLLAR_DIVA_BYPASS + +/* PMC master clock register settings */ + +#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA +#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV2 + +/* USB UTMI PLL start-up time */ + +#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << CKGR_UCKR_UPLLCOUNT_SHIFT) + +/* Resulting frequencies */ + +#define SAM3U_MCK_FREQUENCY (48000000) +#define SAM3U_PLLA_FREQUENCY (96000000) +#define SAM3U_CPU_FREQUENCY (48000000) /* LED definitions ******************************************************************/ -#define LED_STARTED 0 -#define LED_HEAPALLOCATE 1 -#define LED_IRQSENABLED 2 -#define LED_STACKCREATED 3 -#define LED_INIRQ 4 -#define LED_SIGNAL 5 -#define LED_ASSERTION 6 -#define LED_PANIC 7 +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 /************************************************************************************ * Public Data diff --git a/nuttx/configs/sam3u-ek/ostest/defconfig b/nuttx/configs/sam3u-ek/ostest/defconfig index cc19b2cd9..7c5b33c31 100755 --- a/nuttx/configs/sam3u-ek/ostest/defconfig +++ b/nuttx/configs/sam3u-ek/ostest/defconfig @@ -129,43 +129,43 @@ CONFIG_USART3_ISUART=y # CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # CONFIG_USARTn_2STOP - Two stop bits # -CONFIG_USART_SERIAL_CONSOLE=Y +CONFIG_UART_SERIAL_CONSOLE=Y CONFIG_USART0_SERIAL_CONSOLE=n CONFIG_USART1_SERIAL_CONSOLE=n CONFIG_USART2_SERIAL_CONSOLE=n CONFIG_USART3_SERIAL_CONSOLE=n -CONFIG_USART_TXBUFSIZE=256 +CONFIG_UART_TXBUFSIZE=256 CONFIG_USART0_TXBUFSIZE=256 CONFIG_USART1_TXBUFSIZE=256 CONFIG_USART2_TXBUFSIZE=256 CONFIG_USART3_TXBUFSIZE=256 -CONFIG_USART_RXBUFSIZE=256 +CONFIG_UART_RXBUFSIZE=256 CONFIG_USART0_RXBUFSIZE=256 CONFIG_USART1_RXBUFSIZE=256 CONFIG_USART2_RXBUFSIZE=256 CONFIG_USART3_RXBUFSIZE=256 -CONFIG_USART_BAUD=115200 +CONFIG_UART_BAUD=115200 CONFIG_USART0_BAUD=115200 CONFIG_USART1_BAUD=115200 CONFIG_USART2_BAUD=115200 CONFIG_USART3_BAUD=115200 -CONFIG_USART_BITS=8 +CONFIG_UART_BITS=8 CONFIG_USART0_BITS=8 CONFIG_USART1_BITS=8 CONFIG_USART2_BITS=8 CONFIG_USART3_BITS=8 -CONFIG_USART_PARITY=0 +CONFIG_UART_PARITY=0 CONFIG_USART0_PARITY=0 CONFIG_USART1_PARITY=0 CONFIG_USART2_PARITY=0 CONFIG_USART3_PARITY=0 -CONFIG_USART_2STOP=0 +CONFIG_UART_2STOP=0 CONFIG_USART0_2STOP=0 CONFIG_USART1_2STOP=0 CONFIG_USART2_2STOP=0 |