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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-02-15 18:29:40 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-02-15 18:29:40 +0000 |
commit | 7dec1c70ecb7e1430322b96193de262159e37827 (patch) | |
tree | 3f54bf88dab10b3fdae6702d4e9f4ebe2e7d3ede /nuttx/configs/skp16c26 | |
parent | 77b776139052f3a4c931329bc4bd0517817489b5 (diff) | |
download | px4-nuttx-7dec1c70ecb7e1430322b96193de262159e37827.tar.gz px4-nuttx-7dec1c70ecb7e1430322b96193de262159e37827.tar.bz2 px4-nuttx-7dec1c70ecb7e1430322b96193de262159e37827.zip |
Add support for M16C timer interrupt
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1505 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/skp16c26')
-rw-r--r-- | nuttx/configs/skp16c26/include/board.h | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/nuttx/configs/skp16c26/include/board.h b/nuttx/configs/skp16c26/include/board.h index b087ec072..ffb80b69e 100644 --- a/nuttx/configs/skp16c26/include/board.h +++ b/nuttx/configs/skp16c26/include/board.h @@ -51,7 +51,7 @@ /* Xin Freq */ -#define XIN_FREQ 20e6 /* 20MHz */ +#define M16C_XIN_FREQ 20000000 /* 20MHz */ /* Switches */ @@ -67,10 +67,39 @@ #define YLW_LED p7_4 #define GRN_LED p7_2 -#define RED_DDR pd8_0 // LED port direction register +#define RED_DDR pd8_0 /* LED port direction register */ #define YLW_DDR pd7_4 #define GRN_DDR pd7_2 +/* Define any of the following to specify interrupt priorities. A default + * value of 5 will be used for any unspecified values + */ + +#undef M16C_INT3_PRIO /* INT3 interrupt priority */ +#undef M16C_INT5_PRIO /* INT5 interrupt priority */ +#undef M16C_INT4_PRIO /* INT4 interrupt priority */ +#undef M16C_BCN_PRIO /* Bus collision detection interrupt priority */ +#undef M16C_DM0_PRIO /* DMA0 interrupt priority */ +#undef M16C_DM1_PRIO /* DMA1 interrupt priority */ +#undef M16C_KUP_PRIO /* Key input interrupt priority */ +#undef M16C_AD_PRIO /* A-D conversion interrupt priority */ +#undef M16C_S2T_PRIO /* UART2 transmit interrupt priority */ +#undef M16C_S2R_PRIO /* UART2 receive interrupt priority */ +#undef M16C_S0T_PRIO /* UART0 transmit interrupt priority */ +#undef M16C_S0R_PRIO /* UART0 receive interrupt priority */ +#undef M16C_S1T_PRIO /* UART1 transmit interrupt priority */ +#undef M16C_S1R_PRIO /* UART1 receive interrupt priority */ +#define M16C_TA0_PRIO 5 /* Timer A0 interrupt priority */ +#undef M16C_TA1_PRIO /* Timer A1 interrupt priority */ +#undef M16C_TA2_PRIO /* Timer A2 interrupt priority */ +#undef M16C_TA3_PRIO /* Timer A3 interrupt priority */ +#undef M16C_TA4_PRIO /* Timer A4 interrupt priority */ +#undef M16C_TB0_PRIO /* Timer B0 interrupt priority */ +#undef M16C_TB1_PRIO /* Timer B1 interrupt priority */ +#undef M16C_TB2_PRIO /* Timer B2 interrupt priority */ +#undef M16C_INT0_PRIO /* INT0 interrupt priority */ +#undef M16C_INT1_PRIO /* INT1 interrupt priority */ + /********************************************************************************/ /* Macro Definitions */ /********************************************************************************/ |